Modular Chip Redundant Interface Switching for Flexible Die Placement
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Solution Overview
Problem
The modular chip approach faces challenges in achieving flexible die placement and high-speed interconnections due to space limitations and the need for multiple versions of dies with differently located interface circuits, leading to increased costs and logistics complications.
Innovation Solution
Incorporating redundant peripheral interface circuits and a switch circuit in the chip package, allowing for the selection and alignment of the most suitable interface circuit with the core die for high-speed transmission, even in non-ideal placements, and using straight wire interconnections to minimize signal transmission length.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple versions of dies with differently located interface circuits are manufactured to achieve flexible die placement, then adaptability is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The interface circuit functionality is segmented into multiple redundant interface units within the same die version. Instead of creating multiple die versions with differently located interfaces, the patent implements multiple interface units (e.g., first interface unit, second interface unit, third interface unit) that can be selectively activated based on die placement position, thereby achieving flexible placement without manufacturing complexity
Solution Approach 2:
The system dynamically selects which interface unit to activate based on the actual die placement position. The interface unit selection is determined after die placement, allowing the system to adapt to different placement scenarios without requiring pre-manufactured die versions. This dynamic selection resolves the contradiction by making the interface configuration flexible through software/control logic rather than hardware variation
2Speed
If interface circuits are positioned for ideal alignment with core die, then interconnection speed is improved, but adaptability to non-ideal placements deteriorates
Solution Approach 1:
The interface circuit is divided into multiple redundant interface units positioned at different locations on the die. Each interface unit can serve as an alternative connection point to the core die, allowing the system to maintain high-speed interconnection even when die placement is not ideal. The redundant units provide multiple path options for high-speed data transmission
Solution Approach 2:
The patent pre-configures multiple interface units as backup connection points before die placement. This beforehand cushioning ensures that even if the primary interface alignment is not ideal, alternative interface units are already available to maintain high-speed connection, thereby cushioning against the adverse effects of non-ideal placement
3Productivity
If redundant interface circuits are added to enable flexible placement, then yield is improved, but device complexity increases
Solution Approach 1:
The redundant interface units are designed with identical functionality and can universally replace each other. Each interface unit can independently perform the same interface function, allowing any healthy unit to be activated based on placement and test results. This universality increases yield without proportionally increasing complexity, as the redundant units are functional copies rather than diverse components
Solution Approach 2:
The system changes the operational parameter of which interface unit is active based on test results and placement position. Instead of physically reconfiguring the hardware, the patent uses parameter change (selection of active interface unit) to achieve redundancy benefits. This approach increases yield while minimizing complexity by using software/control logic rather than complex hardware switching mechanisms
Data Source
AI summary
Aspects of the disclosure provide a chip package that includes a first die and a second die. The first die has a processing circuit and a first interface circuit. The second die is disposed in a proximity to the first die and coupled to the first die. The second die includes internal functional circuits, two or more second interface circuits with an identical configuration, and a switch circuit. A specific second interface circuit is electrically connected to the first interface circuit via wires. The switch circuit is configured to select the specific second interface circuit from the two or more second interface circuits, and couple the specific second interface circuit to the internal functional circuits on the second die.