Modular Multiplication Algorithm Optimization via Parallel Reduction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current modular multiplication algorithms, such as Montgomery and Barrett, face inefficiencies due to serial reduction processes, which hinder performance, especially for large numbers, as they require multiple serial steps, leading to performance bottlenecks in cryptographic constructions like RSA and ECC.

Innovation Solution

The optimization technique interleaves multiplication and reduction components, utilizing precomputed constants to reduce the number of serial steps in the reduction process, specifically by calculating AL*KM instead of AL*B and AH*B*2k, allowing for parallel operations and reducing the number of serial steps in Montgomery and Barrett multiplication algorithms.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If classical modular multiplication with division by N is used, then accuracy is maintained, but speed deteriorates due to expensive division operations requiring quotient digit estimation and correction

Engineering Contradiction:
Improvemultiplication speedVSAvoidalgorithm complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent changes the division parameter from N to R, where R is a carefully chosen constant (power of two) that makes division trivial through bit shifting. This parameter substitution transforms the expensive division-by-N operation into a simple bit-shift operation, dramatically improving speed while maintaining mathematical correctness of the modular multiplication result

Inventive Principle:
Principle #35Parameter changes

2Speed

If Montgomery multiplication with precomputed constants is used, then speed improves by avoiding division by N, but device complexity increases due to precomputation requirements

Engineering Contradiction:
Improvereduction speedVSAvoidprecomputation complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent performs preliminary computation of the constant R and its properties before the actual modular multiplication. By precomputing R as a power of two and establishing its relationship with N, the algorithm eliminates the need for complex quotient digit estimation during the reduction phase, trading one-time setup work for significantly faster execution

Inventive Principle:
Principle #10Preliminary action

3Productivity

If serial reduction processes are used in Montgomery and Barrett algorithms, then accuracy is maintained, but productivity deteriorates due to multiple serial steps required for large numbers

Engineering Contradiction:
ImprovethroughputVSAvoidserial processing time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent segments the reduction process into independent parallel operations by utilizing the bit-shift property of division by R. Instead of sequential quotient digit estimation and correction steps, the algorithm divides the work into segments that can be computed simultaneously, dramatically reducing the time loss from serial processing while maintaining accuracy

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20230401037A1Optimization technique for modular multiplication algorithms
Publication Date: 2023.12.14 INTEL CORP
  • US20230401037A1 patent drawing
  • US20230401037A1 patent drawing
  • US20230401037A1 patent drawing

AI summary

Methods and apparatus for optimization techniques for modular multiplication algorithms. The optimization techniques may be applied to variants of modular multiplication algorithms, including variants of Montgomery multiplication algorithms and Barrett multiplication algorithms. The optimization techniques reduce the number of serial steps in Montgomery reduction and Barrett reduction. Modular multiplication operations involving products of integer inputs A and B may be performed in parallel to obtain a value C that is reduced to a residual RES. Modular multiplication and modular reduction operations may be performed in parallel. The number of serial steps in the modular reductions are reduced to L, where L serial steps, where w is a digit size in bits, and L is a number of digits of operands=[k/w].