Modular Partial Reconfiguration for FPGA Resource Optimization

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Solution Overview

Problem

Existing dynamic modular partial reconfiguration techniques for integrated circuits, such as FPGAs, face limitations in instantiating multiple modules without reserving entire rows or columns of configurable logic blocks (CLBs) and require recompilation for static route routing, which hinders efficient resource utilization and power management.

Innovation Solution

A system that generates and merges configuration information for static and dynamic design portions concurrently, allowing partial bitstream configuration of FPGAs without reserving entire CLB rows or columns, and preserves static routes through modular reconfiguration without recompilation, using bus macros to ensure seamless module transitions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If entire rows or columns of CLBs are reserved for dynamic module replacement, then module reconfiguration is enabled, but device area and resource utilization deteriorate

Engineering Contradiction:
Improvemodule reconfiguration capabilityVSAvoiddevice area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent divides the reconfiguration capability into segments by allowing individual modules to be replaced independently rather than requiring entire rows or columns to be reserved. This segmentation enables partial reconfiguration of specific CLB regions while leaving other areas available for static logic, thereby reducing the area consumed by reconfiguration infrastructure.

Inventive Principle:
Principle #1Segmentation

2Area of stationary object

If dynamic modular partial reconfiguration is implemented without reserving entire rows or columns, then resource utilization improves, but routing complexity increases

Engineering Contradiction:
Improvedevice areaVSAvoidrouting complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-reserving specific routing resources and establishing routing infrastructure before dynamic module replacement occurs. This advance preparation enables seamless module substitution without requiring complex real-time routing calculations, thus managing routing complexity while enabling flexible resource utilization.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If static routes are preserved during module replacement, then system reliability improves, but reconfiguration flexibility deteriorates

Engineering Contradiction:
Improvesystem reliabilityVSAvoidreconfiguration flexibility
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent applies local quality by differentiating between static routes that must be preserved and dynamic routes that can be modified during reconfiguration. Static routes maintain system reliability by ensuring critical signal paths remain unchanged, while dynamic routes provide flexibility for module replacement. This localized approach to route management allows both reliability and flexibility to coexist.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS7640526B1Modular partial reconfiguration
Publication Date: 2009.12.29 XILINX INC
  • US7640526B1 patent drawing
  • US7640526B1 patent drawing
  • US7640526B1 patent drawing

AI summary

A method for instantiating a design in programmable logic of an integrated circuit is described. First configuration information is generated for configuration of the static portion of the design. The first configuration information includes routing information for routing static routes of the static portion of the design using interconnect lines. Second configuration information is generated for configuration of the at least one dynamic portion of the design. The first configuration information and the second configuration information are merged to provide third configuration information, the third configuration information being for configuration of the at least one module in the programmable logic.