Modular Random Value Generator Using LFSR Segmentation
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Solution Overview
Problem
Current random number generators suffer from short cycle lengths, ease of cracking, high implementation costs, and reliance on secret designs, which limit their effectiveness and efficiency in generating truly random and non-deterministic value streams.
Innovation Solution
The development of a modular system using edit modules, uncertainty functions, and dynamic seed management to generate random value streams, which includes a one-way function and random edit processes, decoupling the output from the original memory locations to produce a non-deterministic stream.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If classic random functions are used, then statistical randomness is achieved, but cycle length becomes too short
Solution Approach 1:
The random value generation system is divided into multiple independent LFSRs (Linear Feedback Shift Registers), each generating its own random sequence. These segmented generators work in parallel and their outputs are combined through non-linear functions, allowing each segment to maintain long cycle length while the combination provides enhanced statistical randomness properties.
Solution Approach 2:
Multiple LFSR sequences are combined using non-linear functions to create a composite random value generator. This composite structure leverages the long cycle lengths of individual LFSRs while the non-linear combination ensures statistical randomness, achieving both requirements simultaneously.
2Reliability
If function complexity is increased to resist cracking, then security improves, but hardware cost and implementation complexity increase
Solution Approach 1:
The system dynamically selects and switches between multiple LFSR configurations and non-linear combination functions based on operational requirements. This dynamic approach allows the generator to adapt its complexity level, using simpler configurations when security requirements are lower and more complex configurations when higher security is needed, optimizing the balance between security and resource usage.
Solution Approach 2:
Multiple LFSRs are instantiated as identical or similar modular units, each implementing the same core algorithm. This copying approach allows the system to achieve security through quantity and combination rather than through a single highly complex function, reducing the burden on individual components while maintaining overall security.
3Productivity
If hardware-based random generators are implemented, then performance is improved, but recurring chip costs increase
Solution Approach 1:
The LFSR-based generator is designed as a universal hardware module that can be configured for different security levels and application requirements through parameter settings rather than structural changes. This multi-functionality allows a single hardware design to serve multiple purposes, reducing the need for specialized expensive chips for each application.
Solution Approach 2:
The system achieves different security levels and performance characteristics by changing parameters such as LFSR polynomial coefficients, initial seed values, and combination function parameters, rather than requiring different hardware architectures. This parameter-based configuration allows flexible adaptation to various requirements without increasing hardware complexity.
4Reliability
If secret designs are used to prevent cracking, then security is maintained, but testing and review are limited
Solution Approach 1:
The patent introduces publicly documented mathematical foundations and verification mechanisms that act as intermediaries between the secret implementation details and the security verification process. These intermediaries allow independent verification of security properties without revealing the actual secret keys or proprietary algorithms, enabling thorough testing and review while maintaining security.
Data Source
AI summary
A system and method of generating a one-way function and thereby producing a random-value stream. Steps include: providing a plurality of memory cells addressed according to a domain value wherein any given domain value maps to all possible range values; generating a random domain value associated with one of the memory cells; reading a data value associated with the generated random domain value; generating dynamically enhanced data by providing an additional quantity of data; removing suspected non-random portions thereby creating source data; validating the source data according to a minimum randomness requirement, thereby creating a validated source data; and integrating the validated source data with the memory cell locations using a random edit process that is a masking, a displacement-in-time, a chaos engine, an XOR, an overwrite, an expand, a remove, a control plane, or an address plane module. The expand module inserts a noise chunk.