Modular Stacked Integrated Circuits with Programmable Crossbar Switches
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Solution Overview
Problem
Current electronic systems for extreme miniaturization and low power consumption, such as those for the Internet of Things, face challenges in achieving compact designs and long battery life without sacrificing performance or requiring expensive nanometer-scale engineering and long development cycles.
Innovation Solution
The development of modular stacked integrated circuits using a base chip with programmable attachment slots and crossbar switches, allowing for flexible interconnection of dies with varying metal contact geometries and pitches, and a test and configuration block for alignment and programming of signal channels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional monolithic integrated circuit fabrication is used, then manufacturing precision can be maintained, but device complexity increases and productivity decreases due to sequential processing steps
Solution Approach 1:
The patent divides the integrated circuit fabrication process into separate modular stages: forming individual integrated circuit devices on separate substrates, then stacking them vertically. This segmentation allows parallel processing of multiple devices independently, then combining them through alignment structures and bonding, thereby increasing productivity while managing complexity through standardized modular units
Solution Approach 2:
The patent transitions from planar (2D) monolithic fabrication to three-dimensional (3D) stacked architecture. By adding the vertical dimension through stacking multiple substrates with alignment structures, the system achieves higher integration density and productivity without increasing the complexity of individual fabrication steps, as each layer can be processed independently before assembly
2Adaptability or versatility
If multiple separate fabrication processes are used for different circuit components, then adaptability increases, but manufacturing precision and reliability decrease due to interface errors
Solution Approach 1:
The patent introduces alignment structures as intermediary elements between different integrated circuit substrates. These alignment structures serve as mediators that ensure precise registration and positioning during the stacking process, maintaining manufacturing precision while enabling the assembly of multiple independently fabricated circuit components with different configurations
Solution Approach 2:
The alignment structures are designed with universal functionality to work across different substrate types and circuit configurations. This universal alignment mechanism maintains precise positioning accuracy regardless of the specific circuit design or substrate material, enabling adaptability while preserving manufacturing precision through a standardized interface
3Productivity
If larger wafer sizes are used, then productivity increases, but manufacturing precision and control over fabrication variables worsen
Solution Approach 1:
The patent processes smaller wafers or substrates individually through the fabrication process, maintaining precise control over manufacturing variables. After independent processing of each substrate, the completed devices are stacked and combined. This segmentation allows each small substrate to be processed with high precision while the overall productivity is maintained through parallel processing of multiple substrates and subsequent stacking
Data Source
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AI summary
A system according to some examples herein includes a base chip which may include a plurality of attachment slots for attaching dies thereto. One or more of the attachment slots may be programmable attachment slots. The base chip may further include circuitry for interconnecting the dies attached to the base chip. For example, the base chip may include a plurality of cross bar switches, each of which is associated with respective ones of the plurality of attachment slots. The base chip may further include a configuration block, which is adapted to receive and transmit test signals for determining electrically connected signal lines of one or more attachment slots when one or more dies are attached to the base chip and which is further adapted to receive configuration data for programming signal (including power and ground) channels of the cross bar switches.