Modular Switching Device Packet Fragment Routing
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Solution Overview
Problem
In high-capacity switching systems, efficiently directing network traffic across multiple hardware components is challenging due to the need for reordering packet fragments, which increases latency and resource consumption.
Innovation Solution
A modular switching device with source packet processors that divide data packets into fragments, transmit them to crossbar processors for distribution, and retransmit them in order based on instructions, eliminating the need for reordering at target packet processors, thereby improving resource utilization and reducing latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If packet fragments are transmitted through multiple crossbar processors in parallel, then system bandwidth is increased, but latency increases due to the need for reordering packet fragments at target processors
Solution Approach 1:
The source packet processor performs preliminary actions by tracking packet fragment distribution across crossbar processors and determining retransmission timing before fragments reach the target. This allows the system to reorder fragments proactively rather than reactively, reducing the time fragments must be held at target processors and thereby reducing overall latency while maintaining parallel throughput
2Productivity
If packet fragments are distributed across multiple crossbar processors, then resource utilization is improved, but device complexity increases due to the need for tracking and coordinating fragment retransmission
Solution Approach 1:
The source packet processor acts as an intermediary that maintains state information about distributed packet fragments and coordinates their retransmission. By centralizing the tracking function at the source rather than distributing it across all crossbar processors and target processors, the system achieves good resource utilization while limiting control complexity to a single coordinating entity
Solution Approach 2:
The system implements feedback mechanisms where the source packet processor monitors the distribution status of packet fragments across crossbar processors and adjusts retransmission timing accordingly. This feedback loop enables automatic coordination without requiring complex manual configuration or centralized control, improving resource utilization while keeping the control mechanism relatively simple
Data Source
AI summary
Data packets are received at a source packet processor that is disposed in a modular switching device having a plurality of packet processors and a plurality of crossbar processors coupled to the plurality of packet processors. Each of at least some of the received data packets is divided into a plurality of data packet fragments. The data packet fragments are transmitted to the crossbar processors to distribute the data packet fragments among the crossbar processors. The data packet fragments are stored at respective crossbar processors. An instruction to retransmit first stored packet fragments corresponding to a first data packet that had been received at the source packet processor is selectively transmitted from the source packet processor to the crossbar processors. Based on the instruction received from the source packet processor, the first stored packet fragments is retransmitted to a target packet processor among the plurality of packet processors.