Modular Traffic Manager Scheduling Hierarchy for Network Processor Throughput

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Solution Overview

Problem

Existing network processor architectures face inefficiencies in packet processing due to software-based approaches and limited flexibility in handling new protocols, leading to performance bottlenecks and increased overhead in scheduling and data caching.

Innovation Solution

A modular traffic manager (MTM) dynamically constructs a scheduling hierarchy with a tree structure of schedulers and queues, allowing for flexible task scheduling and efficient packet transmission by iteratively selecting child nodes and forming output packets based on tasks, enabling up to six levels of scheduling hierarchy and supporting millions of queues and schedulers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If software-based approaches with general-purpose processors are used for packet processing, then flexibility in handling different protocols is improved, but processing speed and throughput deteriorate

Engineering Contradiction:
Improveflexibility in handling protocolsVSAvoidprocessing speed
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent segments the packet processing function into two distinct parts: a general-purpose processor that handles high-level control and protocol flexibility, and a dedicated network processor that handles high-speed packet forwarding. This segmentation allows each component to optimize for its specific function, resolving the contradiction between flexibility and speed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a network processor as an intermediary component between the general-purpose processor and the network interface. This intermediary handles the time-critical packet processing tasks, allowing the general-purpose processor to maintain flexibility while the network processor ensures high-speed processing.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If multiple general-purpose processors are added to increase throughput, then processing capacity is improved, but coordination overhead and system complexity increase

Engineering Contradiction:
ImprovethroughputVSAvoidcoordination overhead
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent extracts the packet forwarding function from the general-purpose processors and places it in a dedicated network processor. This extraction eliminates the need for multiple general-purpose processors to coordinate, as the network processor independently handles high-speed packet processing, thus reducing coordination overhead while maintaining throughput.

Inventive Principle:
Principle #2Taking out (Extraction)

3Productivity

If a fixed-pipeline architecture is used for hardware acceleration, then processing speed is improved, but flexibility to handle new protocols deteriorates

Engineering Contradiction:
Improveprocessing speedVSAvoidflexibility for new protocols
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent implements a dynamic architecture where the network processor can be configured at runtime to handle different protocol requirements. The fixed-pipeline hardware provides speed, while the configurable nature allows adaptation to new protocols, resolving the contradiction between speed and flexibility.

Inventive Principle:
Principle #15Dynamics

4Adaptability or versatility

If non-pipelined architecture with general-purpose processors is used, then flexibility in decision-making is improved, but software overhead and processing delay increase

Engineering Contradiction:
Improveflexibility in decision-makingVSAvoidsoftware overhead
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent segments processing tasks by urgency: time-critical packet forwarding is handled by the network processor with minimal software overhead, while less time-critical control decisions remain with the general-purpose processor. This segmentation reduces overall software overhead while preserving flexibility for non-time-critical decisions.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8848723B2Scheduling hierarchy in a traffic manager of a network processor
Publication Date: 2014.09.30 INTEL CORP
  • US8848723B2 patent drawing
  • US8848723B2 patent drawing
  • US8848723B2 patent drawing

AI summary

Described embodiments provide for dynamically constructing a scheduling hierarchy of a network processor. A traffic manager generates a tree scheduling hierarchy having a root scheduler and N scheduler levels. The network processor generates tasks corresponding to received packets. The traffic manager queues the received task in the associated queue, the queue having a corresponding parent scheduler at each of one or more next levels of the scheduling hierarchy up to the root scheduler. A parent scheduler selects, starting at the root scheduler and iteratively repeating at each of the corresponding N scheduling levels until a queue is selected, a child node to transmit at least one task. The traffic manager forms output packets for transmission based on the at least one task from the selected queue.