Compositionally Modulated TFT Active Region for Low-Temperature Integration
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Solution Overview
Problem
Existing thin film transistors (TFTs) made of oxide semiconductors face challenges in integration with previously fabricated devices due to high processing temperatures, which can damage front-end-of-line (FEOL) and middle end-of-line (MEOL) devices.
Innovation Solution
The formation of thin film transistors with a compositionally-modulated active region, including a continuous bottom gate dielectric layer with vertical compositional modulation and a semiconducting metal oxide layer, minimizes surface leakage and allows for direct contact between source and drain electrodes, enabling low-temperature processing without damaging underlying structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high processing temperatures are used to fabricate thin film transistors, then the transistor performance is improved, but previously fabricated FEOL and MEOL devices are damaged
Solution Approach 1:
The patent changes the temperature parameter from high to low processing conditions, enabling TFT fabrication that does not damage previously fabricated FEOL and MEOL devices while maintaining acceptable transistor performance through compositional modulation of the active region
Solution Approach 2:
The patent applies compositional modulation to the active region, creating local variations in material composition that optimize transistor performance at specific locations without requiring high temperatures across the entire structure
2Object-affected harmful factors
If low-temperature processing is used to preserve previously fabricated devices, then integration with existing devices is enabled, but surface leakage increases
Solution Approach 1:
The patent implements compositional modulation within the active region to create local variations in material properties, specifically designing regions with different compositions to suppress surface leakage while maintaining low-temperature processing compatibility
Solution Approach 2:
The patent uses composite material structures with varying compositions within the active region, combining different material phases or stoichiometries to simultaneously achieve low surface leakage and low-temperature processing capability
Data Source
AI summary
A thin film transistor includes an active layer and at least one gate stack. The active layer may be formed using multiple iterations of a unit layer stack deposition process, which includes an acceptor-type oxide deposition process and a post-transition metal oxide deposition process. A surface of each gate dielectric within the at least one gate stack contacts a surface of a respective layer of the oxide of the acceptor-type element so that leakage current of the active layer may be minimized. A source electrode and a drain electrode may contact an oxide layer providing lower contact resistance such as a layer of the post-transition metal oxide or a zinc oxide layer within the active layer.


