Silicon Photonics Modulator Electrode Structure for High-Frequency Operation
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Solution Overview
Problem
In multichannel and highly-dense silicon photonics modulators, achieving a bias electrode inductance close to 0 nH to maintain high-frequency characteristics is challenging, leading to deteriorated frequency response and impedance issues during miniaturization and densification.
Innovation Solution
The electrode structure integrates plural bias electrical wires and ground electrode parts on a silicon substrate, with electrical connections between them, and additional capacitors to reduce impedance and stabilize the modulator's operation, allowing for high-speed operation at high frequencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a bias tee circuit with DC field coil and DC block capacitor is used to maintain signal characteristics and stable operation, then the modulator can operate stably, but the physical size becomes large and monolithic integration on silicon substrate becomes difficult
Solution Approach 1:
The patent extracts the bias voltage application function from the signal electrode side and relocates it to the ground electrode side. By providing a DC power source at the ground electrode instead of using a bias tee at the signal electrode, the large components (DC field coil, DC block capacitor) are removed from the integration circuit, enabling monolithic integration while maintaining stable operation.
Solution Approach 2:
The patent inverts the conventional approach by applying bias voltage at the ground electrode rather than at the signal electrode. This inversion allows the bias voltage to be supplied through the ground electrode without requiring large bias tee components, thus achieving both small size and stable operation.
2Reliability
If impedance of bias circuit is set to be sufficiently high to maintain signal characteristics, then signal quality is preserved, but miniaturization and densification become difficult when multiple modulators are integrated
Solution Approach 1:
The patent removes the high-impedance bias circuit components (resistance wire, DC block capacitor) from each signal electrode and consolidates the bias voltage supply at the ground electrode. This extraction enables miniaturization and densification while maintaining signal characteristics through the alternative bias application path.
3Area of stationary object
If bias voltage is applied at ground electrode side to reduce bias circuit size, then miniaturization is achieved, but inductance component increases causing deteriorated frequency response
Solution Approach 1:
The patent introduces a local capacitor element at the ground electrode side to provide localized impedance compensation. This local quality enhancement counteracts the inductance effect without requiring large bias circuit components, thus maintaining both miniaturization and frequency response performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the frequency response and electrical characteristics of the silicon photonics modulator, maintaining performance even at high frequencies without the adverse effects of increased inductance, as shown in the improved frequency response graphs.
Implementation Method 1
a capacitor element (C2) between the ground electrode (G) and the signal electrode (S)
Data Source
AI summary
The purpose of the present invention is to allow a silicon photonics modulator to be operated at high speed with high frequency by providing an electrode structure for the small multichannel high-density silicon photonics modulator. This electrode structure for a silicon photonics modulator includes, on the planar surface of a silicon substrate, a first layer for forming a plurality of bias electrical wirings, and a second layer formed by aligning each of a plurality of ground electrode portions and each electrical wiring in the first layer.