Modulus Calculation via Operand Segmentation and Lookup Tables
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Solution Overview
Problem
Current modulus computation methods are inefficient, particularly for large operands, as they often require division operations that are costly in terms of computational resources, and are limited by their applicability to prime divisors or integer powers.
Innovation Solution
The proposed solution involves treating the dividend as a hierarchical structure, splitting it into segments that are reduced from one level to another using multiplication and addition/subtraction instructions, avoiding division and bit-by-bit processing, and utilizing pre-calculated results and look-up tables to speed up the computation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional modulus computation methods are used, then the modulus operation can be performed, but the computational overhead is high and bit consumption rate is low due to expensive division operations
Solution Approach 1:
The dividend is divided into multiple segments of equal size, where each segment can be processed independently. This segmentation allows parallel processing of multiple segments simultaneously, increasing the bit consumption rate and reducing overall computational overhead by avoiding sequential division operations.
Solution Approach 2:
The method pre-calculates remainders for each segment modulo the divisor and stores them in lookup tables before actual modulus computation. This preliminary action eliminates the need for expensive division operations during runtime, significantly reducing computational overhead while maintaining high bit consumption rates.
2Ease of operation
If division instructions are used for modulus calculation, then the modulus operation is straightforward, but the computational resources are excessively consumed
Solution Approach 1:
The patent replaces the mechanical division operation with a combination of multiplication, addition, and lookup table operations. By substituting the division instruction with these lighter operations, the method maintains the ease of performing modulus calculation while dramatically reducing computational resource consumption.
Solution Approach 2:
The method uses lookup tables that store pre-computed remainder values for each segment. Instead of performing division, the system copies relevant remainder values from the lookup tables and combines them, which is computationally cheaper while preserving the correctness of the modulus operation.
3Measurement precision
If modulus operation is performed on large operands, then comprehensive results are obtained, but the computation becomes prohibitively slow
Solution Approach 1:
Large operands are segmented into smaller manageable parts that can be processed in parallel. This segmentation maintains the accuracy of the final modulus result by ensuring each segment is correctly reduced, while simultaneously improving computation speed through parallel processing of multiple segments.
Solution Approach 2:
The patent transforms the single large operand modulus problem into multiple smaller segment modulus problems that can be solved in parallel. By adding the dimension of parallel processing, the method maintains measurement precision for large operands while dramatically improving productivity through concurrent computation.
4Adaptability or versatility
If conventional methods are used for non-prime divisors, then general applicability is achieved, but efficiency is significantly reduced
Solution Approach 1:
The patent creates a universal modulus computation method that works efficiently for both prime and non-prime divisors. By using segment-based reduction with lookup tables, the method achieves general applicability to any divisor type while maintaining high computation efficiency, unlike conventional methods that become inefficient for non-prime divisors.
Data Source
AI summary
Modulus operation is performed by a system in an efficient manner taking into account the system's processor and memory architecture. Other features are also provided.


