Middle-Of-Line Etch Stop Layer for Aligned Lateral Transistor Contacts
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Solution Overview
Problem
Establishing reliable and efficient electrical connections within semiconductor devices, particularly between transistors, is challenging due to the need for precise alignment and the introduction of resistance and capacitance that can affect signal propagation and speed.
Innovation Solution
The semiconductor device incorporates an etch stop layer within the interlayer dielectric (ILD) to separate a lateral contact, allowing for efficient connection between the source/drain regions of adjacent transistors through a via, while also enabling connection to a backside power rail via a direct backside contact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a lateral contact is used to connect source/drain regions of adjacent transistors, then electrical connectivity is improved, but the complexity of alignment and manufacturing precision requirements increase
Solution Approach 1:
An etch stop layer is introduced as an intermediary element within the interlayer dielectric structure. This layer serves as a reference plane that facilitates precise alignment of the lateral contact with the source/drain regions of adjacent transistors, thereby improving manufacturing precision while maintaining reliable electrical connectivity.
Solution Approach 2:
The interlayer dielectric is segmented into multiple layers with the etch stop layer positioned between them. This segmentation creates distinct functional zones: the etch stop layer provides alignment reference, the upper dielectric layer provides electrical isolation, and the lower dielectric layer provides mechanical support, thereby simplifying the overall alignment process.
2Productivity
If multiple contacts are introduced to establish electrical connections, then signal transmission efficiency is improved, but the device complexity and power dissipation increase
Solution Approach 1:
The etch stop layer serves multiple functions simultaneously: it provides alignment reference for lateral contacts, acts as a barrier layer to prevent unwanted electrical connections, and serves as a mechanical support structure. This multi-functionality reduces the need for additional separate structures, thereby simplifying device complexity while maintaining efficient signal transmission.
3Manufacturing precision
If the etch stop layer is positioned within the interlayer dielectric, then alignment precision is improved, but the manufacturing process complexity increases
Solution Approach 1:
The etch stop layer is formed during the dielectric deposition process before the lateral contact fabrication. This preliminary action establishes the alignment reference plane in advance, allowing subsequent contact patterning steps to be performed with higher precision without requiring additional complex alignment procedures.
Data Source
AI summary
A semiconductor device includes a first transistor adjacent to a second transistor and an etch stop layer within an interlayer dialectic (ILD) to separate a lateral contact and a plurality of backside source/drain region-gate cut dielectric layers. The lateral contact connects a via over a first source/drain region of the first transistor to a second source/drain region of the second transistor.