Partial Molding via Mold Barriers for IC Package Yield
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Solution Overview
Problem
The challenge in packaging integrated circuits is the high yield loss due to the inclusion of defective dies, which cannot be fully tested while still attached to wafers, and the need to protect and enable the addition of other components like memory packages in electronic devices such as cellular phones.
Innovation Solution
A method and assembly that utilize a substrate with a mold barrier to prevent encapsulant from moving between regions, allowing for the testing of dies and subsequent mounting of other components, while enabling partial molding of packaged assemblies to protect and facilitate the addition of additional components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If dies are attached to wafers and packaged without individual testing, then manufacturing efficiency is improved, but yield is reduced due to inclusion of defective dies
Solution Approach 1:
The substrate surface is divided into multiple regions with mold barriers separating them, allowing individual testing and packaging of dies in separate regions. This segmentation enables yield improvement through testing while maintaining manufacturing efficiency through parallel processing of multiple regions.
2Object-affected harmful factors
If full molding is applied to protect components, then component protection is improved, but adaptability is reduced for subsequent addition of memory and other components
Solution Approach 1:
Mold barriers are selectively placed to create enclosed regions for components requiring protection while leaving other regions open for future component addition. This local application of molding provides targeted protection without sacrificing adaptability.
3Adaptability or versatility
If mold barriers are added to enable partial molding and component addition, then adaptability is improved, but device complexity increases
Solution Approach 1:
Mold barriers are pre-formed on the substrate before component attachment and molding. This preliminary action simplifies the overall process by establishing the molding boundaries in advance, reducing the complexity of subsequent steps.
Data Source
AI summary
Certain aspects of the present disclosure provide apparatus and techniques for partially molding packages for integrated circuits. A packaged assembly for integrated circuits includes: a substrate having at least one mold barrier between a first region on a first surface of the substrate and a second region on the first surface; a die attached to the substrate; one or more components attached to the substrate in the first region; and a first encapsulant over the one or more components in the first region, wherein the at least one mold barrier is configured to block a portion of the first encapsulant from moving from the first region of the substrate to the second region of the substrate during an application of the first encapsulant.