Molded Semiconductor Die Singulation Without Sidewall Cracks

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Solution Overview

Problem

Conventional semiconductor package manufacturing methods, such as sawing, often result in chips and cracks on the die and sidewalls, compromising the reliability of the package and limiting the shape of the die perimeter to square or rectangular forms.

Innovation Solution

The method involves etching notches into the wafer using photoresist layers and deep reactive-ion etching techniques, applying a mold compound that anchors to ridges on the sidewalls, and grinding to singulate the packages, allowing for different shapes like octagons and rounded rectangles, and ensuring all sides of the die are covered for protection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If sawing is used to singulate packages, then manufacturing efficiency is improved, but chips and cracks occur on the die and sidewalls compromising reliability

Engineering Contradiction:

Improvemanufacturing efficiencyVSAvoidpackage reliability

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent replaces the mechanical sawing process with a chemical etching process using deep reactive-ion etching (DRIVE) to singulate the semiconductor packages. This substitution eliminates the mechanical contact that causes chips and cracks, thereby maintaining manufacturing efficiency while significantly improving package reliability.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the singulation method from mechanical cutting to chemical etching with specific control of etch depth, etch rate, and temperature parameters. By optimizing these parameters, the process achieves clean separation without mechanical damage, resolving the contradiction between efficiency and reliability.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If conventional molding is applied, then protection is provided, but the die perimeter is limited to square or rectangular shapes

Engineering Contradiction:

Improvedie protectionVSAvoiddie shape versatility

Core Design Contradiction:

ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent modifies the molding process parameters, specifically controlling the mold compound viscosity, injection pressure, and temperature to enable the molding material to flow into and conform to complex die perimeters including octagons and rounded rectangles, thereby achieving both protection and shape versatility.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent applies mold release agents or surface treatments to the die surface before molding to prevent adhesion issues that would limit complex shape formation. This preliminary action enables the mold compound to properly conform to intricate die perimeters while maintaining protective encapsulation.

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability and versatility of semiconductor packages by preventing cracks and chips, enabling various geometric shapes and ensuring comprehensive protection of the die with the mold compound.

Implementation Method 1

etching notches into the wafer using photoresist layers and deep reactive-ion etching techniques

Methodology Applied

Scientific EffectEtching:

Implementation Method 2

applying a mold compound that anchors to ridges on the sidewalls

Methodology Applied

Scientific EffectAdhesion: Adhesive

Implementation Method 3

grinding to singulate the packages

Methodology Applied

Scientific EffectAbrasion: Abrasion

Data Source

PatentEP3444838B1Semiconductor package including a semiconductor die whose faces are all covered with molding material and related methods

Publication Date: 2023.08.30 SEMICON COMPONENTS IND LLC

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AI summary

Implementations of a method of forming a semiconductor package may include forming electrical contacts on a first side of a wafer, applying a photoresist layer to the first side of the wafer, patterning the photoresist layer, and etching notches into the first side of the wafer using the photoresist layer. The method may include applying a first mold compound into the notches and over the first side of the wafer, grinding a second side of the wafer opposite the first side of the wafer to the notches formed in the first side of the wafer, applying one of a second mold compound and a laminate resin to a second side of the wafer, and singulating the wafer into semiconductor packages. Six sides of each semiconductor package may be covered by one of the first mold compound, the second mold compound, and the laminate resin.