Molded Interposer Package with Metal Studs and Anisotropic Etching
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Solution Overview
Problem
Conventional interposer packages face high fabrication costs due to complex processes, limited size due to poor mechanical strength, and design challenges such as inadequate power delivery, thermal conductivity, and circuit density limitations, making them unsuitable for advanced applications like multi-die and hybrid wire bonding.
Innovation Solution
A molded interposer package featuring metal studs with a molding material encapsulating them, allowing exposed surfaces for chip connection and solder ball contact, along with a simplified fabrication method using anisotropic etching and redistribution layers to reduce process complexity and enhance rigidity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If conventional resin-based core substrate is used, then fabrication process can be completed, but mechanical strength is poor limiting package size
Solution Approach 1:
The patent uses a molded substrate combining organic resin and inorganic filler particles (such as alumina, silica, or glass beads) to create a composite material that achieves both high mechanical strength and large package size. The inorganic filler provides structural rigidity while the organic resin matrix binds the components, resolving the contradiction between strength and size.
Solution Approach 2:
The patent modifies the physical and chemical parameters of the substrate material by adjusting the type, size, and concentration of inorganic fillers, as well as the resin composition and curing conditions. This enables optimization of mechanical properties to support larger package dimensions without sacrificing strength.
2Ease of manufacture
If conventional multilayer wiring process and solder mask process are performed, then interconnect structures can be fabricated, but fabrication cost is high
Solution Approach 1:
The patent extracts and eliminates the solder mask process from the conventional fabrication sequence. Instead of applying a separate solder mask layer, the design uses exposed metal surfaces or alternative protective coatings, reducing both process complexity and fabrication cost while maintaining functionality.
Solution Approach 2:
The patent combines the substrate formation and interconnect structure fabrication into an integrated molded substrate process. The three-dimensional wiring structures are formed directly within the molded substrate material, merging multiple discrete steps (substrate lamination, via formation, wire routing) into a single manufacturing operation, thereby reducing overall complexity.
3Power
If conventional interposer structure is used, then basic connection function is achieved, but power delivery network capability is insufficient
Solution Approach 1:
The patent transitions from planar two-dimensional wiring to three-dimensional vertical interconnect structures within the molded substrate. Power and signal traces are routed through multiple layers and depths of the substrate, enabling enhanced power delivery capability by utilizing the third dimension for current paths, thereby increasing power capacity without proportionally increasing surface complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces fabrication costs, increases package size, and addresses design challenges by providing improved power delivery, thermal conductivity, and circuit density, enabling more advanced applications such as multi-die and hybrid wire bonding.
Implementation Method 1
A first anisotropic etching process is performed to remove a portion of the metal sheet from the top surface of the metal sheet, thereby forming a plurality of first recesses in the metal sheet
Data Source
AI summary
A method for fabricating a molded interposer package includes performing a first anisotropic etching process to remove a portion of the metal sheet from a top surface of the metal sheet, thereby forming a plurality of first recesses in the metal sheet, forming a molding material covering the top surface, filling the first recesses, forming a plurality of first via openings in the molding material, wherein the first via openings expose the top surface, forming a plurality of first metal vias in the first via openings and a plurality of first redistribution layer patterns respectively on the first metal vias, performing a second anisotropic etching process to remove a portion of the metal sheet from a bottom surface of the metal sheet until a bottom of the molding material is exposed, and forming a solder mask layer on the molding material, leaving the first redistribution layer patterns exposed.


