Molded IPD Chip-on-Wafer Packaging With EMI Shielding
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Solution Overview
Problem
Existing chip-on-wafer (CoW) devices lack improvements in manufacturing processes, particularly in integrating passive devices and addressing electromagnetic interference, leading to inefficiencies and limitations in miniaturization and integration of semiconductor devices.
Innovation Solution
The development of a semiconductor device and method for forming molded integrated-passive device (IPD) chip-on-wafer (CoW) devices, which involves forming conductive vias, mounting semiconductor die on IPD wafers, encapsulating with a molding compound, and incorporating EMI shielding to enhance electrical connectivity and reduce interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If multiple die are mounted directly on semiconductor wafer (CoW method), then device size is reduced, but manufacturing process complexity increases and integration of passive devices becomes difficult
Solution Approach 1:
The invention segments the semiconductor manufacturing process by separating active device fabrication on silicon wafers from passive device fabrication on separate IPD wafers. This allows each type of device to be optimized independently while maintaining overall system integration, resolving the contradiction between miniaturization and manufacturing complexity.
Solution Approach 2:
The invention introduces an intermediate substrate that carries both active semiconductor die and passive IPD devices. This intermediate substrate acts as a mediator that simplifies the final packaging process while enabling complex integration, thereby reducing overall manufacturing complexity despite the multi-step process.
2Productivity
If device miniaturization is pursued, then integration density increases, but electromagnetic interference becomes more severe
Solution Approach 1:
The invention extracts passive devices into separate IPD wafers that are fabricated independently from active devices. This physical separation allows for optimized layout and grounding strategies that reduce electromagnetic interference, while the final integration maintains high density through the chip-on-wafer approach.
Solution Approach 2:
The invention applies different design and fabrication qualities to different regions: active devices on silicon wafers, passive devices on IPD wafers, and EMI shielding structures in specific locations. This localized optimization allows high integration density while controlling EMI in critical areas through targeted shielding and grounding.
3Ease of manufacture
If conventional CoW method is used, then manufacturing is simpler, but electrical connectivity and EMI shielding are insufficient
Solution Approach 1:
The invention merges the advantages of conventional CoW simplicity with enhanced connectivity by integrating passive devices directly onto the same wafer substrate as active devices. This unified structure provides improved electrical connectivity and inherent EMI shielding without requiring complex multi-step packaging processes.
Data Source
AI summary
A semiconductor device has an integrated passive device (IPD) wafer including an IPD formed on the IPD wafer. A semiconductor die is mounted on the IPD wafer. An interconnect structure is mounted on the IPD wafer. The IPD wafer is singulated to provide an IPD die with the IPD, semiconductor die, and interconnect structure. An encapsulant is deposited over the IPD die with the interconnect structure exposed from the encapsulant. A shielding layer is formed over the encapsulant.