Molded Memory-on-Package Layout With Uniform Heat Spreader Shielding

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Solution Overview

Problem

The integration of multiple IC dies with different form factors into a single electronic package is challenging due to size mismatches, leading to inefficiencies in thermal management and potential signal integrity issues from electromagnetic interference (EMI) or radio frequency interference (RFI).

Innovation Solution

A uniform thickness heat spreader design is used, with a mold layer and through mold vias (TMVs) that provide electrical continuity and shield against interference, allowing for efficient thermal management and signal routing without the need for a pedestal heat spreader, which matches the height of memory ICs and other chiplets, thereby addressing form factor differences and interference issues.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If a pedestal heat spreader is used to match different IC heights, then thermal management is improved, but device complexity and manufacturing cost increase

Engineering Contradiction:

Improvethermal managementVSAvoidheat spreader structure

Core Design Contradiction:

TemperatureVSDevice complexity

Solution Approach 1:

The patent applies local quality by creating a mold layer with varying thickness in different regions. The mold layer is thicker in areas where taller ICs are located and thinner where shorter ICs are placed, allowing a uniform heat spreader to contact all ICs at their respective surfaces. This resolves the contradiction by eliminating the need for a complex pedestal heat spreader while maintaining effective thermal contact with each IC type.

Inventive Principle:

Principle #3Local quality

2Adaptability or versatility

If multiple IC dies with different form factors are integrated into a single package, then system functionality is improved, but manufacturing precision requirements increase

Engineering Contradiction:

Improveintegration of multiple IC typesVSAvoiddie placement accuracy

Core Design Contradiction:

Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent introduces a mold layer as an intermediary between the package substrate and the heat spreader. This mold layer accommodates ICs with different form factors by providing a tailored interface for each IC type. The mold layer absorbs the dimensional mismatches between different IC dies, eliminating the need for high-precision placement while enabling integration of multiple IC types with varying form factors.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Adaptability or versatility

If ICs are placed at different heights in the package, then adaptability to different form factors is improved, but signal integrity deteriorates due to EMI/RFI

Engineering Contradiction:

Improveform factor accommodationVSAvoidelectromagnetic interference

Core Design Contradiction:

Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patent merges the mold layer and heat spreader into a unified structure where the heat spreader is in direct contact with the top surface of the mold layer, which itself contacts all ICs. This merged structure provides both mechanical support for different IC heights and electromagnetic shielding, as the continuous conductive heat spreader-mold layer assembly acts as a shield against EMI/RFI while accommodating various form factors.

Inventive Principle:

Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enables efficient thermal management and improved signal integrity by using a uniform heat spreader and TMVs to match the height of various ICs, reducing costs associated with unconventional parts and minimizing EMI/RFI interference, thus enhancing the overall efficiency of the electronic package.

Implementation Method 1

a uniform thickness heat spreader design is used... allowing for efficient thermal management

Methodology Applied

Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

through mold vias (TMVs) that provide electrical continuity

Methodology Applied

Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 3

shield against interference... minimizing EMI/RFI interference

Methodology Applied

Scientific EffectElectromagnetic shielding: Faraday Cage

Data Source

PatentUS20240006399A1Die-stacked and molded architecture for memory on package (MOP)

Publication Date: 2024.01.04 INTEL CORP

AI summary

An electronic device includes a package substrate; a memory integrated circuit (IC) mounted on the package substrate; a mold layer including one or more chiplets and a base IC die within the mold layer, the one or more chiplets arranged on the base IC die; a top chiplet mounted on a surface of the mold layer, wherein a combined height of the mold layer and the top chiplet substantially matches a height of the memory IC; and a heat spreader having a uniform surface contacting the memory IC and the top chiplet.