Molded Semiconductor Package Structure for Thin-Die Wafer Support
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Solution Overview
Problem
Conventional wafer level chip scale package manufacturing requires post-molding grinding of terminal bumps for electroless or immersion plating, which is inefficient and prone to wafer breakage during thinning, limiting the ability to create thinner dies without additional processing steps or carriers.
Innovation Solution
A semiconductor package design featuring a semiconductor die with a first metal layer of 10 microns and a second metal layer of 20 microns, encapsulated in a mold compound except for the bump faces, formed through a method involving groove creation, overmolding, and grinding to singulate the die, using techniques like mechanical polishing and chemical mechanical planarization to prevent wafer breakage and enhance structural support.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If post-molding grinding of terminal bumps is performed for electroless or immersion plating, then the bumps can be plated, but the process is inefficient and prone to wafer breakage during thinning
Solution Approach 1:
The patent applies preliminary action by forming the metal bump layers (copper and tin) on the wafer before the molding process. This allows the bumps to be pre-prepared and protected during subsequent processing steps, eliminating the need for post-molding grinding and plating operations that cause wafer breakage and reduce efficiency
Solution Approach 2:
The patent extracts the bump formation process from the post-molding sequence and places it in the pre-molding sequence. By taking out the bump formation step and performing it earlier, the process eliminates the harmful post-molding grinding and plating operations that cause wafer breakage
2Length of moving object
If the wafer is thinned to create thinner dies, then thinner dies are produced, but the wafer is more prone to breakage during processing
Solution Approach 1:
The patent applies beforehand cushioning by encapsulating the wafer and dies in a mold compound before thinning operations. This provides structural support and protection to the thin wafer during processing, preventing breakage while enabling the production of thinner dies with improved reliability
Solution Approach 2:
The mold compound acts as an intermediary that provides mechanical support to the thin wafer during processing. By introducing this intermediary material, the wafer can be thinned to greater degrees without becoming fragile and prone to breakage
3Reliability
If additional processing steps or carriers are used to prevent wafer breakage, then wafer strength is improved, but the process complexity and number of steps increase
Solution Approach 1:
The patent merges the bump formation process with the pre-molding process by forming both the metal bumps and the mold compound in sequence before wafer thinning. This consolidation of operations provides wafer protection without requiring separate carrier systems or additional processing steps, thereby reducing overall process complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for thinner die production without wafer breakage, reduces processing steps, and improves reliability by fully encapsulating the die, enhancing structural support and preventing contaminant ingress, thus meeting stringent automotive and other application standards.
Implementation Method 1
a mold compound encapsulating all the semiconductor die except for a face of the one or more bumps
Implementation Method 2
grinding the mold compound to expose a face of the plurality of bumps; grinding the second side of the wafer to singulate a plurality of die
Implementation Method 3
chemical mechanical planarization (CMP)
Data Source
AI summary
Implementations of semiconductor packages may include: a semiconductor die having a first side and a second side; one or more bumps included on the first side of the wafer, the bumps comprising a first layer having a first metal and a second layer including a second metal. The first layer may have a first thickness and the second layer may have a second thickness. The semiconductor package may also have a mold compound encapsulating all the semiconductor die except for a face of the one or more bumps.