Six-Sided Molded Semiconductor Package for Die Damage Protection

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Solution Overview

Problem

The challenge in the semiconductor industry is to reduce the size of semiconductor packages while ensuring protection and reliability, as smaller packages are more susceptible to damage during manufacturing.

Innovation Solution

The method involves forming a plurality of electrical contacts on a wafer, applying a mold compound into notches etched into the wafer, and using grinding and singulation techniques to create semiconductor packages with all six sides covered by the mold compound or laminate resin.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If semiconductor package size is decreased, then economic benefits and technological benefits are improved, but risk of damage to semiconductor die and package during manufacturing increases

Engineering Contradiction:
Improvepackage sizeVSAvoidrisk of damage during manufacturing
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent applies mold compound to cover and protect the semiconductor die before packaging and manufacturing processes. This protective molding creates a cushioning effect that prevents damage to the die and package during subsequent handling, transport, and manufacturing operations, thereby resolving the contradiction between miniaturization and manufacturing reliability

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Reliability

If protective cover or molding is applied to protect semiconductor, then protection from environment, electrostatic discharge, and electrical surges is improved, but package size increases

Engineering Contradiction:
Improveprotection from hazardsVSAvoidpackage size
Core Design Contradiction:
ReliabilityVSVolume of moving object

Solution Approach 1:

The patent employs a thin film-like mold compound that conformally coats the semiconductor die structure. This molding provides comprehensive protection against environmental factors, electrostatic discharge, and electrical surges while maintaining a compact profile that does not significantly increase package size, thus resolving the contradiction between protection and miniaturization

Inventive Principle:
Principle #30Flexible shells and thin films

Data Source

PatentUS12341014B2Multi-faced molded semiconductor package and related methods
Publication Date: 2025.06.24 SEMICON COMPONENTS IND LLC
  • US12341014B2 patent drawing
  • US12341014B2 patent drawing
  • US12341014B2 patent drawing

AI summary

Implementations of a method of forming a semiconductor package may include forming electrical contacts on a first side of a wafer, applying a photoresist layer to the first side of the wafer, patterning the photoresist layer, and etching notches into the first side of the wafer using the photoresist layer. The method may include applying a first mold compound into the notches and over the first side of the wafer, grinding a second side of the wafer opposite the first side of the wafer to the notches formed in the first side of the wafer, applying one of a second mold compound and a laminate resin to a second side of the wafer, and singulating the wafer into semiconductor packages. Six sides of a die included in each semiconductor package may be covered by one of the first mold compound, the second mold compound, and the laminate resin.