Molding Layer Trenches for Chip Package Warpage Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current chip package structures face challenges with warpage and thermal expansion issues due to the lack of effective buffering mechanisms, leading to reduced yield and potential damage to the redistribution structure during processing.

Innovation Solution

The formation of trenches in the molding layer, which are spaced apart from the chips and serve as buffer trenches to accommodate thermal expansion, reducing warpage and protecting the redistribution structure from damage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the molding layer is formed over the redistribution structure without buffer trenches, then the structural integrity is maintained, but thermal expansion causes warpage and damage to the redistribution structure

Engineering Contradiction:
Improveprotection of redistribution structureVSAvoidstructure of molding layer
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The molding layer is segmented by forming buffer trenches that divide it into separate regions. These trenches create isolation zones that allow different parts of the molding layer to expand independently during thermal cycling, preventing stress accumulation and warpage while protecting the underlying redistribution structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Buffer trenches are formed in advance within the molding layer to create predetermined cushioning spaces. These trenches act as expansion buffers that absorb thermal expansion stresses before they can propagate to and damage the redistribution structure, effectively cushioning the system against thermal shocks.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Productivity

If buffer trenches are formed in the molding layer, then warpage is reduced and yield is improved, but the manufacturing process becomes more complex

Engineering Contradiction:
Improveyield of chip package structureVSAvoidformation process of molding layer
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The buffer trenches are formed in the molding layer before final packaging steps. This preliminary action ensures that the expansion buffers are already in place to prevent warpage during subsequent thermal processing, thereby improving yield without requiring complex post-processing adjustments.

Inventive Principle:
Principle #10Preliminary action

3Temperature

If the molding layer is continuous without trenches, then heat dissipation is hindered, but forming trenches increases structural complexity

Engineering Contradiction:
Improveheat dissipation capabilityVSAvoidmolding layer configuration
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The molding layer transitions from a uniform continuous structure to a non-uniform structure with localized trenches. These trenches are strategically positioned to create thermal pathways that enhance heat dissipation from the chip and redistribution structure, while the remaining molding material maintains structural support functions.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The trenches in the molding layer effectively reduce warpage and improve the yield of the chip package structure by providing a buffer for thermal expansion, preventing damage to the redistribution structure and enhancing heat dissipation.

Implementation Method 1

The trenches provide a space for accommodating the thermal expansion of the molding layer

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Implementation Method 2

a heat dissipation layer over the chips and the molding layer. The heat dissipation layer is configured for heat dissipation

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS11682599B2Chip package structure with molding layer and method for forming the same
Publication Date: 2023.06.20 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11682599B2 patent drawing
  • US11682599B2 patent drawing
  • US11682599B2 patent drawing

AI summary

A method for forming a chip package structure is provided. The method includes disposing a chip over a redistribution structure. The method includes forming a molding layer over the redistribution structure and adjacent to the chip. The method includes partially removing the molding layer to form a trench in the molding layer, and the trench is spaced apart from the chip.