Semiconductor Package Molding Layer Via Penetration

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Solution Overview

Problem

The challenge lies in fabricating semiconductor packages with increased reliability and structural stability, particularly due to the difficulties in handling and testing small-sized semiconductor chips, and achieving defect reduction during the manufacturing process.

Innovation Solution

A semiconductor package is designed with a redistribution substrate, a connection substrate, and a molding layer that includes a base layer with vias and patterns, where the molding layer extends into holes to fill spaces and provide structural integrity, reducing defects and enhancing reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the semiconductor chip size is reduced for high integration, then the integration capacity increases, but the difficulty of adhering, handling, and testing solder balls increases

Engineering Contradiction:
Improveintegration capacityVSAvoidhandling difficulty
Core Design Contradiction:
Quantity of substanceVSEase of operation

Solution Approach 1:

The invention divides the connection substrate into multiple layers (base layer, intermediate layer, upper layer) with distinct functions. The base layer provides mechanical support and contains through-holes for molding compound flow, while the intermediate and upper layers provide electrical connection. This segmentation allows the chip to remain small for high integration while the multi-layer structure handles the complexity of solder ball attachment and testing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention introduces a molding compound that flows through through-holes in the base layer to fill spaces between the chip and connection substrate. This molding compound acts as an intermediary that provides mechanical support and electrical insulation, enabling small chips to be reliably handled and tested by distributing mechanical stresses throughout the package structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If conventional packaging methods are used, then the manufacturing process is simpler, but the reliability and structural stability are insufficient

Engineering Contradiction:
Improvestructural stabilityVSAvoidpackage structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The invention performs preliminary actions during the packaging process by forming through-holes in the base layer before mounting the chip. The molding compound is prepared to flow through these pre-formed holes to fill voids and provide structural support. This preliminary preparation ensures reliable structural stability while the subsequent processes follow conventional packaging methods.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The connection substrate uses composite construction with a base layer containing through-holes, intermediate layers with conductive patterns, and an upper layer. This composite structure provides both mechanical strength for structural stability and electrical connectivity, while the molding compound penetrates through the base layer to bond components together, achieving high reliability without excessive complexity.

Inventive Principle:
Principle #40Composite materials

3Reliability

If the molding layer does not extend into holes, then the fabrication process is simpler, but gaps remain causing short-circuits and reduced reliability

Engineering Contradiction:
Improveelectrical insulationVSAvoidfabrication complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The molding compound is applied in a liquid or paste state that automatically flows through the through-holes in the base layer by capillary action and gravity. This self-flowing behavior fills gaps and provides electrical insulation without requiring complex additional processing steps. The molding compound serves itself to penetrate and fill voids, achieving reliable electrical insulation while maintaining ease of manufacture.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11417597B2Semiconductor package and method of fabricating the same
Publication Date: 2022.08.16 SAMSUNG ELECTRONICS CO LTD
  • US11417597B2 patent drawing
  • US11417597B2 patent drawing
  • US11417597B2 patent drawing

AI summary

Provided is a semiconductor package including a redistribution substrate, a connection substrate on the redistribution substrate, the connection substrate having an opening that penetrates the connection substrate, a semiconductor chip in the opening of the connection substrate, and a molding layer that covers the semiconductor chip and the connection substrate, and fills a space between the semiconductor chip and the connection substrate, the connection substrate includes a base layer, a plurality of vias that vertically penetrate the base layer, a plurality of first patterns on a top surface of the base layer and connected to the plurality of vias, and a plurality of second patterns on a bottom surface of the base layer and connected to the plurality of vias, an extension of the molding layer extends into a plurality of holes that are spaced apart from the plurality of vias and are formed to vertically penetrate the base layer.