MOM Capacitor Cell Structure for Dense SoC Decoupling Layouts
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Solution Overview
Problem
In system-on-chip applications, existing capacitors lack the density and performance required for miniaturization and increased functionality, particularly in mixed-signal circuits where decoupling capacitors and high-frequency noise filters are needed.
Innovation Solution
The development of a metal-oxide-metal (MOM) capacitive device with a cell structure that includes electrodes with first and second buses and fingers in different metal layers, allowing for direct abutment of adjacent cells and increased density without violating design rules.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If existing capacitor structures are used, then device functionality is maintained, but density and performance for miniaturization are insufficient
Solution Approach 1:
The patent transitions from planar 2D capacitor layouts to a 3D vertical architecture by stacking multiple metal layers (M1-M6) with vias connecting them. The capacitor structure extends through multiple elevation levels with electrodes positioned at different heights, utilizing the vertical dimension to increase capacitance density without occupying additional lateral area.
Solution Approach 2:
The patent implements nested capacitor structures where electrodes are positioned within and between metal layers, with inner electrodes surrounded by outer electrodes. The complex interdigitated finger patterns nest multiple electrode pairs within a compact footprint, allowing cascading capacitance contributions from multiple electrode combinations.
2Area of stationary object
If cell density is increased for miniaturization, then area efficiency improves, but design rule violations occur due to metal/via overlap
Solution Approach 1:
The patent divides the capacitor electrode into multiple segmented finger patterns distributed across different metal layers. Instead of a single continuous electrode, the structure uses discrete finger segments (e.g., M1 fingers, M2 fingers, M3 fingers) that can be independently routed and connected through vias, allowing spacing compliance while maintaining electrical continuity.
Solution Approach 2:
The patent resolves metal/via overlap conflicts by transitioning to 3D vertical routing. Vias connect metal layers at different elevations, allowing electrical connections without lateral overlap. The multi-layer architecture separates overlapping conductors in the vertical dimension, satisfying planar design rules while maintaining electrical connectivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables a higher density of capacitive devices, improving performance for a given area and enhancing the reliability of semiconductor devices by reducing metal/via overlap violations.
Implementation Method 1
a second bus in a second elevation, extending along a second direction different than the first direction, and electrically connected to the first bus through a via
Implementation Method 2
a first group of fingers in the first elevation and extending along the first direction; and a second groups of fingers in the second elevation and extending along the second direction. Each finger of the first group of fingers overlaps each finger of the second group of fingers
Data Source
AI summary
A semiconductor device includes a metal-oxide-metal (MOM) cell including a first bus at a first elevation and extending along a first direction, and a second bus at a second elevation, extending along a second direction different from the first direction, and electrically connected to the first bus through a via. The MOM cell also includes a first group of fingers at the first elevation and extending along the first direction; and a second group of fingers at the second elevation and extending along the second direction. Each finger of the first group of fingers is electrically connected to the second bus through a corresponding via, each finger of the second group of fingers is electrically connected to the first bus through a corresponding via, and each finger of the first group of fingers overlaps each finger of the second group of fingers.