Monocrystalline Silicon Array Substrate for Integrated Drive Circuits

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Solution Overview

Problem

Current Gate Driver On Array (GOA) technologies struggle to integrate both scan and data drive circuits into the array substrate due to the complexity and size requirements of data drive circuits, leading to reduced display area and performance limitations.

Innovation Solution

The use of a monocrystalline silicon substrate with integrated scan and data drive circuits, where transistors are formed in an active region within the monocrystalline silicon layer, allowing for smaller transistor sizes and increased carrier mobility, enabling the integration of both circuits on the substrate while maintaining performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If data drive circuit is integrated into array substrate using conventional GOA technology, then manufacturing complexity is reduced, but transistor size becomes too large and display area is reduced

Engineering Contradiction:
Improvemanufacturing complexityVSAvoiddisplay area
Core Design Contradiction:
Device complexityVSArea of moving object

Solution Approach 1:

The patent changes the fundamental material parameter from amorphous silicon to monocrystalline silicon, which fundamentally alters the carrier mobility parameter. This parameter change enables transistors to achieve the same driving capability at much smaller sizes, thereby resolving the contradiction between integration and display area.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent transitions from conventional planar transistor design to a vertically integrated structure where monocrystalline silicon provides high-speed carrier transport in the vertical dimension, enabling compact horizontal footprint while maintaining performance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of moving object

If transistor size is reduced to increase display area, then display area increases, but carrier mobility becomes insufficient for high-resolution displays

Engineering Contradiction:
Improvedisplay areaVSAvoidcarrier mobility
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

The patent fundamentally changes the material parameter from amorphous silicon to monocrystalline silicon, which provides inherently superior carrier mobility. This parameter change enables small transistors to maintain high carrier mobility, simultaneously achieving large display area and high reliability.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If conventional amorphous silicon is used for transistors, then manufacturing process is simpler, but electron mobility is too low for high-resolution displays

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidelectron mobility
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent changes the material parameter from amorphous silicon to monocrystalline silicon, fundamentally improving electron mobility while maintaining manufacturing feasibility through established semiconductor processing techniques adapted for monocrystalline substrates.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11552148B2Array substrate, manufacturing method thereof, and display apparatus
Publication Date: 2023.01.10 ORDOS YUANSHENG OPTOELECTRONICS
  • US11552148B2 patent drawing
  • US11552148B2 patent drawing
  • US11552148B2 patent drawing

AI summary

An array substrate, its manufacturing method, and a display apparatus are provided. The array substrate having a substrate, includes: a monocrystalline silicon substrate employed as the substrate including a central display area, a first peripheral area, and a second peripheral area; substrate circuits integrated with a scan drive circuit in the first peripheral area, a data drive circuit in the second peripheral area, and a plurality of pixel circuits in the central display area; a plurality of scan lines in the central display area and coupled to the scan drive circuit; and a plurality of data lines in the central display area and coupled to the data drive circuit. The scan drive circuit, the data drive circuit, and the plurality of pixel circuits include a plurality of transistors, each of which has an active region inside the monocrystalline silicon layer.