Monolayer Transistor Doping With Low Contact Resistance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing transistors with very thin semiconducting layers face high contact resistance between metal terminals and the semiconducting monolayer, leading to performance issues due to large contact resistance and potential damage from ion implantation.
Innovation Solution
A bottom-contact structure is employed with a dopant layer applied to the contact regions and/or spacer regions of the semiconducting monolayer, reducing contact resistance without blocking the transport path.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ion implantation is used to dope the semiconducting layer, then doping can be achieved, but the very thin semiconducting layer is damaged
Solution Approach 1:
A dopant layer is deposited over the semiconducting layer, acting as an intermediary that contains the dopant material. This dopant layer protects the thin semiconducting layer from direct ion implantation damage while still enabling doping through subsequent thermal diffusion or other non-damaging methods. The dopant layer serves as a reservoir that can transfer dopants to the semiconducting layer without requiring direct ion bombardment of the fragile monolayer.
2Reliability
If contact resistance between metal terminals and semiconducting monolayer is reduced by conventional methods, then electrical performance improves, but the thin semiconducting layer suffers from damage
Solution Approach 1:
The dopant layer is deposited in advance before forming the metal source/drain terminals. This preliminary doping action prepares the contact regions with appropriate dopant concentration before the metal terminals are deposited, ensuring low contact resistance from the outset. The dopant layer is already in place to facilitate good electrical contact, eliminating the need for subsequent ion implantation that would damage the thin semiconducting layer.
3Speed
If the semiconducting layer is made very thin to reduce parallel capacitance, then transistor speed improves, but contact resistance increases
Solution Approach 1:
The dopant layer is applied selectively to the contact regions where metal terminals will be formed, creating local high-dopant concentration zones. This local quality enhancement at the contact interfaces reduces contact resistance specifically where needed, without requiring the entire semiconducting layer to be thicker. The thin semiconducting layer is maintained in the channel region for low capacitance, while only the contact regions receive additional dopant to reduce contact resistance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method significantly improves transistor performance by reducing contact resistance and protecting the semiconducting layer from damage, while maintaining low parallel capacitance between terminals.
Implementation Method 1
A dopant layer is applied to the contact regions and/or spacer regions of the semiconducting monolayer
Data Source
AI summary
Methods for making transistors with a semiconducting monolayer and low contact resistance are disclosed. The source/drain terminals are on opposite sides of the semiconducting monolayer from the gate terminal. The contact and/or spacer regions of the semiconducting monolayer are covered with a dopant layer on the surface opposite the source/drain terminals. The gate dielectric layer directly contacts the semiconducting monolayer. The resulting structure maintains high mobility in the semiconducting layer and has low contact resistance.