Cryptocurrency hardware wallet on monolithic chip with common physical countermeasures and secure memory
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Solution Overview
Problem
Existing secure electronic devices, particularly cryptocurrency hardware wallets, are vulnerable to hacking due to unprotected communication links, outdated cryptographic algorithms, and inferior non-volatile memory structures that can be compromised through physical access and side-channel attacks, lacking advanced computational architectures and robust physical countermeasures.
Innovation Solution
A monolithic semiconductor device with a multi-core processor and secure element on a single substrate, incorporating filamentary resistive switching non-volatile memory for secure data storage, hardware-encoded cryptographic algorithms, and a robust physical countermeasure shield to protect communication pathways, ensuring secure transactions and resistant to physical hacking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If separate chips are used for processor and secure element, then ease of manufacture is improved, but device complexity increases and security is compromised
Solution Approach 1:
The patent merges the processor and secure element onto a single monolithic chip, eliminating the need for separate chips and inter-chip communication interfaces. This integration reduces device complexity while maintaining security through unified physical countermeasures protection, directly resolving the contradiction between ease of manufacture and device complexity.
2Ease of operation
If communication links are unprotected, then ease of operation is improved, but security deteriorates
Solution Approach 1:
The patent implements physical countermeasures as a preliminary protective layer against hacking attempts before they can affect the communication links. This includes anti-side-channel attack designs and fault injection countermeasures that proactively prevent attacks, ensuring security without complicating the ease of operation.
3Reliability
If advanced cryptographic algorithms are used, then security is improved, but device complexity increases
Solution Approach 1:
The patent replaces complex software-based cryptographic implementations with hardware-encoded cryptographic algorithms directly integrated into the processor. This substitution provides advanced security capabilities while reducing device complexity by eliminating the need for separate cryptographic co-processors or complex software layers.
4Reliability
If robust physical countermeasures are implemented, then security is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent employs anti-side-channel attack techniques that rely on statistical parameter analysis rather than precise physical measurements. By changing the approach from requiring high manufacturing precision to using statistical parameter changes, the system achieves robust security while maintaining compatibility with standard manufacturing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances security and computational power while maintaining flexibility, providing robust protection against physical and side-channel attacks, ensuring secure cryptocurrency transactions and data integrity.
Implementation Method 1
incorporating filamentary resistive switching non-volatile memory for secure data storage
Data Source
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AI summary
An electronic hardware wallet for conducting cryptocurrency transactions, blockchain transactions, or other secure communications is embodied on a monolithic integrated circuit (IC) die supported on a single substrate. The monolithic semiconductor device can include a nonvolatile data store for storing application software executable by the multi-core processor, and the secure element can include a secure data store for storing secret data (e.g., a private key) for use in a secure electronic transaction. In some embodiments, the secure element can include hardware logic embodying a cryptocurrency algorithm associated with executing the secure electronic transaction and can have a limited and selective communication bus between the secure element and the multi-core processor. The electronic hardware wallet can communicatively couple with one or more other devices to facilitate a multi-party computation (MPC) algorithm for authenticating the cryptocurrency algorithm and validating the secure electronic transaction.