Monolithic Galvanic Isolator Using Deep Trench Isolation
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Solution Overview
Problem
Existing methods for galvanic isolation between electrical circuits, such as high-value discrete capacitance and silicon-on-insulator (SOI) technology, require large circuit sizes, increase complexity and cost, and introduce power loss and current leakage due to the need for resistor networks and extensive chip area usage.
Innovation Solution
An integrated monolithic galvanic isolator is implemented using a semiconductor device with a semiconductor on insulator wafer, featuring a wide deep trench for isolation between electrical circuits, allowing for true galvanic isolation without resistor networks, and enabling energy and information exchange through capacitive, inductive, or other coupling methods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-value discrete capacitance or SOI technology is used for galvanic isolation, then galvanic isolation between electrical circuits is achieved, but circuit size and complexity increase
Solution Approach 1:
The patent merges multiple functions into a single integrated monolithic device: galvanic isolation, energy exchange, and signal transmission are all achieved within one semiconductor structure. The first and second electrical circuits are integrated on the same semiconductor substrate with the trench structure providing isolation while maintaining compact form factor.
Solution Approach 2:
The patent uses a deep trench structure that extends vertically through the semiconductor substrate to achieve galvanic isolation. This vertical dimension approach allows isolation without requiring large horizontal circuit areas, resolving the contradiction between isolation effectiveness and circuit size.
2Reliability
If resistor networks are used for galvanic isolation, then isolation between circuits is provided, but power loss and current leakage occur
Solution Approach 1:
The patent extracts and eliminates the resistor network component from the galvanic isolation implementation. Instead of using resistors to achieve isolation, the invention uses a pure capacitive coupling structure where the trench-filled dielectric material provides isolation without the parasitic resistance that causes power loss and current leakage.
Solution Approach 2:
The patent introduces a dielectric material filling the trench structure as an intermediary between the first and second electrical circuits. This dielectric layer provides galvanic isolation while allowing capacitive coupling for energy and signal exchange, replacing the resistor network intermediary that caused energy losses.
3Reliability
If extensive chip area is used for galvanic isolation, then isolation effectiveness is improved, but manufacturing cost increases
Solution Approach 1:
The patent achieves effective galvanic isolation by utilizing the vertical dimension through deep trench structures rather than requiring large horizontal chip areas. The trench extends downward through the substrate, providing isolation effectiveness without consuming excessive surface area, thus reducing manufacturing costs.
Solution Approach 2:
The patent changes the isolation parameter from horizontal distance to vertical depth. By making the trench depth the critical parameter rather than the horizontal separation distance, the design achieves effective isolation with minimal chip area occupation, improving ease of manufacture and reducing cost.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces product area and process complexity, eliminates power loss and current leakage, and provides effective galvanic isolation suitable for high-bandwidth applications like computer networks and industrial equipment, while integrating all necessary circuitry on a single chip.
Implementation Method 1
A wide deep trench is formed in the semiconductor on insulator wafer to galvanically isolate the first electrical circuit from the second electrical circuit
Implementation Method 2
Energy and/or information may be exchanged using, for example, capacitance
Implementation Method 3
Energy and/or information may be exchanged using, for example, capacitance, induction
Data Source
AI summary
A semiconductor device is described that includes a first electrical circuit and a second electrical circuit formed on a semiconductor on insulator wafer. The semiconductor on insulator wafer has a layer of semiconducting material formed over a buried layer of insulating material formed over a supporting layer of material. A wide deep trench is formed in the semiconductor on insulator wafer to galvanically isolate the first electrical circuit from the second electrical circuit. The first electrical circuit and the second electrical circuit are coupled together for exchanging energy between the galvanically isolated electrical circuits.