Monolithic GaN-HEMT and Schottky Diode Integration
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Solution Overview
Problem
The existing methods for monolithic integration of High Electron Mobility Transistors (HEMTs) and Schottky diodes require complex two-step fabrication processes, leading to increased costs and parasitic resistances and capacitances, which hinder high-frequency performance.
Innovation Solution
A monolithically integrated GaN-HEMT and Schottky diode structure is fabricated using a common epitaxial structure with self-aligned technology, where a T-shaped gate and low resistance layers minimize device parasitic resistances and capacitances, and the Schottky contact is formed directly with the 2DEG channel, reducing intrinsic junction capacitance and series resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a two-step fabrication process is used to monolithically integrate HEMTs and Schottky diodes, then both devices can be fabricated on the same chip, but the fabrication complexity and cost increase significantly
Solution Approach 1:
The patent merges the fabrication of HEMTs and Schottky diodes into a single unified process by growing both device structures simultaneously on the same epi-wafer using a common AlGaN/GaN heterostructure. This eliminates the need for separate fabrication steps and reduces overall process complexity while maintaining monolithic integration capability.
Solution Approach 2:
The patent creates a universal epi-structure that can serve dual purposes: the same AlGaN/GaN heterostructure layers are used to fabricate both HEMT devices and Schottky diode devices. This multi-functional approach allows a single fabrication process to produce multiple device types on the same chip, reducing both complexity and cost.
2Adaptability or versatility
If a two-step fabrication process with separate diode and HEMT fabrication steps is used, then device structures can be optimized independently, but parasitic resistances and capacitances increase
Solution Approach 1:
The patent combines the fabrication processes to minimize parasitic elements by creating shared structures. The common epi-structure and integrated fabrication approach reduce the number of interfaces and discontinuities between devices, thereby minimizing parasitic resistances and capacitances that would otherwise accumulate from separate fabrication steps.
3Reliability
If conventional Schottky diode structures are used with air-bridge interconnects, then parasitic capacitances can be minimized, but fabrication complexity and cost increase
Solution Approach 1:
The patent extracts and eliminates the need for complex air-bridge interconnect structures by forming a direct planar Schottky contact from the anode metal to the 2DEG channel. This removes the intermediate air-bridge structures entirely, achieving low parasitic capacitance through a simpler direct-contact approach.
Solution Approach 2:
The patent transitions from a three-dimensional air-bridge interconnect structure to a two-dimensional planar Schottky contact. By changing the dimensional approach from vertical air-bridges to a planar metal-to-2DEG contact, the patent achieves equivalent or superior parasitic reduction with significantly reduced structural complexity.
4Reliability
If separate epi-layers are grown for diodes and HEMTs, then each device can have optimized layer structure, but fabrication cost increases
Solution Approach 1:
The patent creates a universal epi-structure where the same AlGaN/GaN heterostructure layers serve both HEMT and Schottky diode fabrication needs. This multi-functional epi-structure eliminates the need to grow separate optimized epi-layers for each device type, significantly reducing fabrication cost while maintaining the ability to optimize device performance through selective processing.
Solution Approach 2:
The patent uses parameter changes in the fabrication process to achieve device optimization from a common epi-structure. By adjusting processing parameters such as etch conditions, metal deposition patterns, and annealing parameters, the patent can optimize both HEMT and Schottky diode performance from the same base structure, eliminating the need for separate epi-growth optimization.
Data Source
AI summary
Monolithic integration of high-frequency GaN-HEMTs and GaN-Schottky diodes. The integrated HEMTs/Schottky diodes are realized using an epitaxial structure and a fabrication process which reduces fabrication cost. Since the disclosed process preferably uses self-aligned technology, both devices show extremely high-frequency performance by minimizing device parasitic resistances and capacitances. Furthermore, since the Schottky contact of diodes is formed by making a direct contact of an anode metal to the 2DEG channel the resulting structure minimizes an intrinsic junction capacitance due to the very thin contact area size. The low resistance of high-mobility 2DEG channel and a low contact resistance realized by a n+GaN ohmic regrowth layer reduce a series resistance of diodes as well as access resistance of the HEMT.