Monolithic HVIC Control System for Symmetrically Grounded Half-Bridge Circuits
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current control systems for power semiconductor switches, particularly in high-power applications, face challenges with galvanic isolation and signal transmission across different reference potentials, leading to issues like latch-up and loss of function due to parasitic thyristor structures, especially when switching in the negative direction.
Innovation Solution
A monolithically integrated control system with bidirectional level shifters and interface level shifters, utilizing Silicon on Insulator (SOI) technology for reliable signal transmission and isolation, ensuring operation even with negative reference potentials, and incorporating multiple level shifters for enhanced blocking capability and reduced power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If galvanic isolation is implemented using pulse transformers or optocouplers for high-voltage applications, then potential separation between primary and secondary sides is achieved, but device complexity and loss of time increase
Solution Approach 1:
The patent merges the isolation function and signal transmission function into a single integrated level shifter circuit. The SOI technology enables both galvanic isolation and bidirectional signal transmission through one device structure, eliminating the need for separate pulse transformers or optocouplers for each function, thus reducing overall device complexity while maintaining reliability
Solution Approach 2:
The level shifter circuit performs multiple functions simultaneously: it provides galvanic isolation between different potential levels, transmits control signals bidirectionally, and protects against latch-up conditions. This multi-functional integration replaces what would traditionally require multiple separate components, resolving the contradiction between reliability and device complexity
2Strength
If pn isolated technologies are used for potential separation up to 1200V, then blocking capability is improved, but parasitic thyristor structures cause latch-up and loss of function during negative reference potentials
Solution Approach 1:
The patent changes the material parameter from standard silicon to Silicon on Insulator (SOI) technology. This material parameter change fundamentally alters the electrical characteristics, providing both high blocking capability (comparable to pn isolation) and inherent immunity to latch-up effects by eliminating the parasitic thyristor structures that exist in conventional pn-isolated circuits
Solution Approach 2:
The patent converts the potential harm of negative reference potentials that cause latch-up in pn-isolated circuits into a beneficial demonstration of SOI technology's immunity. The SOI structure's inherent properties prevent latch-up even under negative potential conditions, turning a previously harmful operating condition into a validated test case for the technology's superior reliability
3Adaptability or versatility
If bidirectional signal transmission is implemented, then control flexibility is improved, but risk of latch-up during negative reference potentials increases
Solution Approach 1:
The patent changes the material parameter from standard silicon to Silicon on Insulator (SOI) technology. This material parameter change fundamentally alters the electrical characteristics, providing both high blocking capability (comparable to pn isolation) and inherent immunity to latch-up effects by eliminating the parasitic thyristor structures that exist in conventional pn-isolated circuits
Solution Approach 2:
The SOI technology acts as an intermediary that enables bidirectional signal transmission while mediating against the harmful latch-up effect. The insulating layer in SOI structures serves as a protective intermediary that allows voltage potential differences and negative reference potentials without triggering parasitic thyristor conduction, thus enabling flexible bidirectional control without reliability penalties
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides reliable and efficient signal transmission and isolation across different reference potentials, preventing latch-up and ensuring stable operation in high-power applications, even during negative reference potential conditions, thus enhancing the reliability and efficiency of power semiconductor switch control systems.
Implementation Method 1
The SOI technology offers a dielectric potential separation of components or groups of components
Data Source
Figure 1~2
Figure 3~4
Figure 5
AI summary
The invention describes a control system for a half-bridge circuit comprising a higher-level control unit (2), an interface circuit (90), and a control circuit (32) with a primary-side circuit section (4), a control logic (40) with a primary-side reference potential (420), and secondary-side circuit sections (6), each configured with a driver stage (61, 64) for controlling a half-bridge circuit (10) with a DC link (C1, C2) symmetrically grounded at a neutral point (N), with a negative (-DC) and a positive (+DC) voltage connection, and a plurality of semiconductor switches (T1, D1, T4, D4), wherein each semiconductor switch and its associated driver stage has an associated secondary-side reference potential (610, 640). A control level shifter (81, 84) connects the primary-side circuit section to the respective secondary-side circuit section.The primary-side reference potential (420) and a lower secondary-side reference potential (610) of a lower driver stage correspond to the potential of the negative voltage terminal (-DC). Interface level shifters (91, 94) connect the interface circuit to the control logic of the driver circuit. The higher-level control and the interface circuit are at the neutral point potential (N). Furthermore, the interface circuit, the interface level shifters, the control logic, a lower driver level shifter (81), and the associated lower driver stage (61) are monolithically integrated in an HVIC (72).