Monolithic IC with Front and Back Side eNVM Integration
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Solution Overview
Problem
Current manufacturing processes cannot integrate multiple types of embedded non-volatile memory (eNVM) devices, such as MRAM and RRAM, on the same substrate due to conflicting layer sequences, thermal processing incompatibilities, and interconnect conflicts, which limits computational efficiency and operational flexibility.
Innovation Solution
The use of 'metallization on both sides' (MOBS) techniques allows for the integration of two different types of eNVM devices within a single monolithic integrated circuit by placing one type on the front side interconnect layer and another on the back side interconnect layer, enabling separate fabrication processes and optimizing interconnects for each device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If multiple types of eNVM devices are integrated on the same substrate, then computational efficiency and data access speed are improved, but manufacturing complexity increases due to conflicting layer sequences and thermal processing incompatibilities
Solution Approach 1:
The patent divides the substrate into multiple regions, each dedicated to a specific type of eNVM device (e.g., MRAM region, RRAM region). This segmentation allows each region to have its own optimized layer sequence and thermal processing parameters, resolving the conflict between integrating multiple device types and maintaining manufacturing simplicity.
Solution Approach 2:
Different regions of the substrate are assigned different local properties including specific layer sequences, materials, and thermal processing conditions tailored to each eNVM device type. This enables MRAM and RRAM devices to coexist on the same substrate without mutual interference, as each region maintains its optimal manufacturing characteristics.
2Ease of manufacture
If separate substrates are used for different memory devices, then manufacturing processes are simplified, but computational efficiency decreases due to inter-substrate communication requirements
Solution Approach 1:
The patent merges multiple eNVM device types onto a single substrate, eliminating the need for inter-substrate buses and communication interfaces. This integration maintains manufacturing simplicity through standardized processes while dramatically improving computational efficiency by enabling direct interaction between memory devices and logic circuits.
Solution Approach 2:
The patent resolves the manufacturing conflict by adding a spatial dimension to the integration strategy - placing different eNVM device types in different regions or layers of the same substrate rather than attempting to mix them in the same planar space. This dimensional separation allows each device type to maintain its optimal structure while achieving close integration.
3Productivity
If a single type of eNVM device is integrated, then manufacturing processes are optimized for that device type, but operational flexibility and performance range are limited
Solution Approach 1:
The substrate is designed to support multiple functions by integrating different eNVM device types, each optimized for specific operational requirements. MRAM devices can handle high-speed caching operations while RRAM devices handle non-volatile storage, creating a universal memory system that adapts to various computational needs within the same integrated circuit.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances computational efficiency and data access across a broader range of operational states by integrating diverse eNVM devices, reducing power consumption and improving performance, while avoiding the limitations of single-type memory integration.
Implementation Method 1
spin hall effect magneto-resistive random access memory (SHE-MRAM)
Implementation Method 2
The electrical resistance of the free layer relative to an associated magnetized 'fixed' or 'reference' layer is then used to determine a binary value of '1' or '0' in the MRAM device
Implementation Method 3
spin transfer torque MRAM (STT-MRAM)
Implementation Method 4
analogous resistive, non-magnetic mechanism is used for RRAM devices
Data Source
AI summary
Circuits are described that use metallization on both sides techniques to integrate two different types of non-volatile embedded memory devices within a single monolithic integrated circuit device. In an embodiment, a monolithic integrated circuit structure is provided that includes a device layer having one or more logic transistors. A front side interconnect layer is provided above the device layer, as seen in a vertical cross-section taken through the monolithic integrated circuit from top to bottom. A back side interconnect layer is provided below the device layer, as seen in the vertical cross-section. A first type of non-volatile memory device is provided in the front side interconnect layer, and a second type of non-volatile memory device different from the first type of non-volatile memory device is provided in the back side interconnect layer. A back side contact may be used to connect the device layer to a back side interconnect layer.