Monolithic Interconnect Fill for Low-Resistance IC Scaling
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Solution Overview
Problem
Scaling interconnect features in microelectronic devices without incurring performance degradation is challenging due to increased resistance at interfaces between conductive features, which can be exacerbated by thinning barrier layers that fail to prevent electromigration.
Innovation Solution
Forming interconnect features with a continuous monolithic body of conductive material by replacing sacrificial material with conductive material and depositing a conformal barrier layer on aligned or misaligned recesses, eliminating the need for separate barrier layers between conductive features.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If barrier layers are thinned to enable scaling of interconnect features, then device scaling is improved, but resistance at interfaces increases and electromigration prevention deteriorates
Solution Approach 1:
The patent merges the barrier layer function into the liner layer by forming a continuous monolithic conductive body that eliminates the need for separate barrier layers at interfaces. The liner layer is extended to provide barrier functionality across the entire interconnect structure, including at interfaces between conductive features, thereby preventing electromigration without requiring additional thin barrier layers that would increase resistance.
Solution Approach 2:
The patent extracts and removes the separate barrier layer from the interconnect structure, replacing it with a continuous monolithic conductive body where the liner layer provides both structural and barrier functions. This eliminates the interface between conductive features that previously required barrier layers, thereby reducing resistance while maintaining electromigration prevention.
2Reliability
If separate barrier layers are deposited between conductive features, then electromigration is prevented, but resistance increases and manufacturing complexity increases
Solution Approach 1:
The patent combines the barrier layer function with the liner layer formation process. The continuous monolithic conductive body is formed such that the liner layer provides barrier functionality at interfaces without requiring separate barrier layer deposition steps, thereby reducing manufacturing complexity while maintaining electromigration prevention.
Solution Approach 2:
The liner layer is designed to serve multiple functions: providing structural support, preventing electromigration at interfaces, and serving as a diffusion barrier. This multi-functional approach eliminates the need for separate barrier layers, reducing both manufacturing complexity and device structure complexity while maintaining reliability.
3Loss of energy
If continuous monolithic conductive bodies are formed, then resistance is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent performs preliminary alignment of recesses across multiple interconnect layers before forming the continuous monolithic conductive body. By pre-aligning the recesses and ensuring proper overlap, the manufacturing process accommodates the precision requirements early in the fabrication sequence, allowing subsequent deposition steps to form the continuous conductive structure without requiring ultra-precise alignment during critical deposition phases.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces resistance and prevents electromigration, improving the performance of integrated circuits by maintaining a seamless conductive path across interconnect layers.
Implementation Method 1
A liner including (e.g., tantalum or titanium) is conformally deposited on the walls of each recess to provide a barrier layer
Implementation Method 2
forming interconnect features with a continuous monolithic body of conductive material by replacing sacrificial material with conductive material
Data Source
AI summary
An integrated circuit structure includes a first interconnect layer including a first dielectric material. The first dielectric material has a first recess therein, the first recess having a first opening. The integrated circuit structure further includes a second interconnect layer above the first interconnect layer. The second interconnect layer includes a second dielectric material that has a second recess therein. The second recess has a second opening. In an example, at least a portion of the first opening of the first recess abuts and overlaps with at least a portion of the second opening of the second recess. In an example, a continuous conformal layer is on walls of the first and second recesses, and a continuous body of conductive material is within the first and second recesses.