Monolithic Integration of Metal Oxide and Dissimilar Semiconductor Devices
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Solution Overview
Problem
Conventional integrated circuit technology compromises on size, manufacturing complexity, and performance when integrating dissimilar semiconductor devices, such as metal oxide thin film transistors and compound semiconductors, due to thermodynamic constraints preventing simultaneous manufacture on a common wafer.
Innovation Solution
A monolithically integrated circuit is developed, where a metal oxide thin film semiconductor device and a dissimilar semiconductor device are fabricated on the same wafer with an electrically conducting interconnect layer connecting them, allowing for concurrent formation of shared layers and processing conditions that do not exceed the thermal budget of the dissimilar semiconductor device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If dissimilar semiconductor devices are separately manufactured and then connected together, then manufacturing flexibility is maintained, but device size increases and manufacturing complexity increases
Solution Approach 1:
The patent merges the fabrication processes of dissimilar semiconductor devices (metal oxide thin film transistors and compound semiconductor devices) into a single monolithic integration on one wafer. By combining previously separate manufacturing steps into a unified process flow with shared processing stages, the invention reduces the number of discrete manufacturing operations while maintaining the ability to fabricate different device types simultaneously, thereby reducing manufacturing complexity without sacrificing flexibility.
2Ease of manufacture
If dissimilar semiconductor devices are separately manufactured and connected, then manufacturing process simplicity is maintained, but circuit design flexibility is limited
Solution Approach 1:
The patent creates a universal fabrication platform that can simultaneously produce multiple types of semiconductor devices (metal oxide thin film transistors, compound semiconductor devices, and potentially other device types) using a common set of processing steps and equipment. This multi-functional approach allows circuit designers to integrate diverse device types with enhanced flexibility while the manufacturing process remains relatively simple and standardized, as the same wafer fabrication line can handle different device configurations.
3Area of stationary object
If monolithic integration of dissimilar semiconductor devices is attempted, then device size is reduced and functionality is expanded, but thermodynamic constraints prevent simultaneous manufacture
Solution Approach 1:
The patent applies local quality by tailoring specific processing conditions to different regions of the wafer where different device types are being fabricated. Different areas of the wafer can have customized thermal budgets, deposition parameters, or processing sequences optimized for the specific device type in that region, while still using a unified overall fabrication process. This allows monolithic integration of dissimilar devices with different thermodynamic requirements on the same wafer.
Solution Approach 2:
The patent utilizes parameter changes by dynamically adjusting processing parameters (such as temperature, pressure, deposition rates, or chemical composition) during the fabrication process to accommodate different device types. By modifying these parameters in real-time or in a controlled sequence, the invention enables simultaneous fabrication of metal oxide thin film devices and compound semiconductor devices that have different optimal processing conditions, overcoming the thermodynamic constraints that previously prevented monolithic integration.
Data Source
AI summary
A monolithically integrated circuit comprising a semiconducting wafer, a metal oxide thin film semiconductor device disposed adjacent a first region of the semiconducting wafer, and a dissimilar semiconductor device disposed adjacent a second region of the semiconducting wafer and fabrication methods thereof.