Monolithic Micro-LED Array Testing Before Display Assembly

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Solution Overview

Problem

The assembly process of large area displays using micro LEDs is hindered by high fault rates due to the inefficiency of pick and place technologies, which can result in faulty LEDs when assembling a large number of components.

Innovation Solution

A method is developed to form and test a monolithic electronic device array by forming a common semiconducting layer on a sacrificial substrate, creating a planarising dielectric layer, etching trenches, and bonding the array to a test substrate for electrical testing and separation, allowing for efficient testing and assembly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If pick and place technology is used to assemble micro LEDs, then large area displays can be formed, but the fault rate increases due to inefficiency in handling large numbers of components

Engineering Contradiction:
Improvedisplay areaVSAvoidfault rate
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

Multiple micro LEDs are merged into a single monolithic electronic device array, where numerous individual LED structures are integrated onto one common semiconducting layer. This allows the entire array to be handled as one unit during assembly, eliminating the fault risks associated with pick-and-place operations on individual components while maintaining large display area capability.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If each component is tested individually before assembly, then the fault rate decreases, but the assembly time increases significantly

Engineering Contradiction:
Improvefault rateVSAvoidassembly time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Testing operations are merged and performed collectively on the entire monolithic electronic device array rather than on individual micro LEDs. The common semiconducting layer serves as a unified platform that allows simultaneous electrical connection and testing of all LED structures in the array, reducing total testing time while maintaining reliability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

Testing is performed as a preliminary action on the complete array before the monolithic device is separated into individual components for assembly. This preliminary collective testing identifies and isolates faulty structures early in the manufacturing process, preventing defective components from being assembled into the final display.

Inventive Principle:
Principle #10Preliminary action

3Loss of time

If a monolithic electronic device array is formed and tested collectively, then testing time is reduced, but the device complexity increases

Engineering Contradiction:
Improvetesting timeVSAvoidmanufacturing process complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The manufacturing process is segmented into distinct stages: formation of the monolithic array on a common semiconducting layer, collective testing of the complete array, and subsequent separation into individual components for assembly. This segmentation allows complex operations to be broken down into manageable steps, reducing overall process complexity despite the advanced nature of monolithic integration.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12471409B2Monolithic electronic device
Publication Date: 2025.11.11 PLESSEY SEMICON LTD
  • US12471409B2 patent drawing
  • US12471409B2 patent drawing
  • US12471409B2 patent drawing

AI summary

A method of forming and testing a plurality of monolithic electronic devices is provided. As part of the method a monolithic device array comprising Group III-nitrides is formed on a sacrificial substrate. A test substrate comprising electrical contacts is aligned with electrical contacts of the monolithic device array and bonded to the monolithic device array via bonding dielectric layers. Power is supplied from the test substrate to test the monolithic devices of the monolithic device array. Portions of the sacrificial substrate are then selectively removed to separate each of the monolithic electronic devices, wherein a sacrificial dielectric layer is removed to separate each monolithic electronic device from the test substrate.