Monolithic T-gate transistor structure for RF performance
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Solution Overview
Problem
Existing approaches to forming T-gates for transistors, such as the replacement metal gate process, are costly and not compatible with silicon CMOS processing, leading to increased gate resistance and manufacturability issues, especially when scaling gate length for RF applications like 5G devices.
Innovation Solution
The formation of T-gates using bi-layered dummy gates and a single patterning operation with wet etch, allowing for a monolithic T-gate structure with reduced gate resistance and low parasitic capacitance, compatible with state-of-the-art CMOS processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If T-gate is metalized in two cycles using replacement-metal-gate process, then gate structure can be formed, but adhesive interface between gate parts increases gate resistance
Solution Approach 1:
The patent merges the formation of the narrow gate part and wide gate part into a single metalization cycle, eliminating the adhesive interface between two separate metalized gate parts. The T-gate structure is formed as one continuous conductive element, reducing gate resistance while maintaining manufacturability through standard CMOS processes.
2Ease of manufacture
If additional lithography and processing operations are used for T-gate and field plate features, then gate structure can be formed, but manufacturing cost and complexity increase
Solution Approach 1:
The patent uses a single gate electrode structure to serve multiple functions: the narrow gate part provides channel control while the wide gate part provides grounding and shielding. This multi-functional design eliminates the need for separate field plate structures and reduces the number of lithography and processing steps required.
3Speed
If gate length is aggressively scaled for RF applications, then transistor speed increases, but manufacturability decreases
Solution Approach 1:
The patent transitions from a planar gate structure to a three-dimensional T-gate structure by adding the wide gate part extending in the lateral dimension. This dimensional change allows aggressive scaling of the narrow gate length for high-speed performance while the wide gate part maintains manufacturability through standard lithography processes that can accommodate larger dimensions.
Data Source
AI summary
A transistor is disclosed. The transistor includes a first part of a gate above a substrate that has a first width and a second part of the gate above the first part of the gate that is centered with respect to the first part of the gate and that has a second width that is greater than the first width. The first part of the gate and the second part of the gate form a single monolithic T-gate structure.