Monolithic Cryptocurrency Wallet Chip With Secure Memory Protection

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Solution Overview

Problem

Existing secure electronic devices and communication systems are vulnerable to hacking and compromise due to unprotected memory storage, outdated cryptographic algorithms, and inadequate physical countermeasures, leading to potential data breaches and security threats in transactions.

Innovation Solution

A monolithic semiconductor device with a multi-core processor and secure element, incorporating non-volatile resistive switching memory and hardware logic for secure transactions, employs a robust physical countermeasure shield and advanced cryptographic algorithms, including multi-party computation, to enhance security and computational power.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory is used to store secure data, then data storage capability is improved, but vulnerability to hacking and physical attacks increases

Engineering Contradiction:
Improvedata storage capabilityVSAvoidvulnerability to hacking
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The patent combines cryptographic processing logic and secure data storage memory into a single integrated circuit device, where the memory is physically protected within the secure element. This merging ensures that even if external hacking attempts occur, the memory remains inaccessible without the integrated cryptographic protection.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The secure data storage memory is nested within the secure element, which itself is integrated into the cryptographic processing device. This nested structure provides multiple layers of protection, where the memory is physically and logically embedded within protective cryptographic boundaries.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If cryptographic algorithms are made more complex, then security against breaking is improved, but computational requirements and processing time increase

Engineering Contradiction:
Improvesecurity against breakingVSAvoidcomputational complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The integrated circuit device performs cryptographic processing internally using its own integrated logic units, eliminating the need for external processing. This self-service approach allows complex cryptographic operations to be executed efficiently within the secure boundaries of the device without requiring external computational resources.

Inventive Principle:
Principle #25Self-service

3Reliability

If separate secure element and processor are used, then security isolation is improved, but device size and manufacturing complexity increase

Engineering Contradiction:
Improvesecurity isolationVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the secure element and processor into a single integrated circuit device fabricated on one substrate. This consolidation maintains security isolation through internal architecture design while simplifying manufacturing by eliminating the need for separate fabrication processes and physical assembly of multiple components.

Inventive Principle:
Principle #5Merging (Combining)

4Device complexity

If monolithic integration is used, then device size and manufacturing are simplified, but security isolation between components may be compromised

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidsecurity isolation
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The integrated circuit device implements different security levels and access controls for different regions and components within the monolithic structure. Critical security functions and data storage areas are protected with higher security measures, while other areas have appropriate access controls, ensuring security isolation is maintained through differentiated local security policies rather than physical separation.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides enhanced security against physical hacking and data breaches, with increased computational power and flexibility, ensuring secure cryptocurrency transactions and data integrity.

Implementation Method 1

a first data bit stored in a first location of the array of resistive switching memory cells

Methodology Applied
Scientific EffectResistive switching: Electrical Resistance

Implementation Method 2

stochastic characteristics of resistive-switching structures have been proposed by the inventor as suitable for generating non-correlated data for random number generation

Methodology Applied
Scientific EffectStochastic characteristics of resistive-switching structures:

Data Source

PatentUS12423681B2Cryptocurrency hardware wallet on monolithic chip with common physical countermeasures and secure memory
Publication Date: 2025.09.23 CROSSBAR INC
  • US12423681B2 patent drawing
  • US12423681B2 patent drawing
  • US12423681B2 patent drawing

AI summary

An electronic hardware wallet for conducting cryptocurrency transactions, blockchain transactions, or other secure communications is embodied on a monolithic integrated circuit (IC) die supported on a single substrate. The monolithic semiconductor device can include a non-volatile data store for storing application software executable by the multi-core processor, and the secure element can include a secure data store for storing secret data (e.g., a private key) for use in a secure electronic transaction. In some embodiments, the secure element can include hardware logic embodying a cryptocurrency algorithm associated with executing the secure electronic transaction and can have a limited and selective communication bus between the secure element and the multi-core processor. The electronic hardware wallet can communicatively couple with one or more other devices to facilitate a multi-party computation (MPC) algorithm for authenticating the cryptocurrency algorithm and validating the secure electronic transaction.