Silicon Nitride Cap Layer for MONOS Memory Reliability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional MONOS type nonvolatile semiconductor memory devices face issues with narrow memory window, variation in data retention and program/erase characteristics, and malfunctions due to downscaling, particularly caused by chemical reactions and mutual diffusion between control gate electrodes and charge block layers.
Innovation Solution
Incorporating a cap layer made of silicon nitride between the charge block layer and control gate electrodes, which acts as a barrier to prevent chemical reactions and mutual diffusion, and is divided for each control gate electrode to enhance memory window expansion and data retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If control gate electrodes are placed directly on charge block layer, then device structure is simple, but chemical reactions and mutual diffusion occur causing insulation degradation
Solution Approach 1:
A cap layer made of silicon nitride is introduced between the control gate electrode and the charge block layer. This intermediary layer prevents direct contact between the two layers, thereby stopping chemical reactions and mutual diffusion while maintaining the overall device structure. The cap layer acts as a barrier that preserves insulation characteristics without significantly increasing device complexity.
2Quantity of substance
If memory cell size is reduced to increase capacity, then memory capacity increases, but characteristics variation becomes unacceptable causing malfunctions
Solution Approach 1:
The silicon nitride cap layer serves as a protective intermediary that stabilizes the interface between the control gate electrode and charge block layer. This stabilization effect becomes particularly important in miniaturized memory cells where characteristic variation is more pronounced. The cap layer ensures uniform electrical characteristics across all cells, preventing malfunctions even as cell size decreases to increase overall memory capacity.
3Ease of manufacture
If conventional MONOS structure is used, then manufacturing process is established, but memory window is narrow limiting rewriting speed and capacity
Solution Approach 1:
The silicon nitride cap layer is integrated into the existing MONOS manufacturing process as an additional layer between the control gate electrode and charge block layer. This simple addition modifies the electrical characteristics to expand the memory window, enabling faster rewriting operations and increased capacity while maintaining compatibility with established manufacturing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The cap layer effectively lowers the erase threshold voltage, expands the memory window, prevents insulation degradation, and reduces variations in data retention and program/erase characteristics, thereby improving the reliability of microscale memory cells.
Implementation Method 1
Incorporating a cap layer made of silicon nitride between the charge block layer and control gate electrodes, which acts as a barrier to prevent chemical reactions and mutual diffusion
Implementation Method 2
forming a cap layer made of silicon nitride by exposing the inner surface of the trench to a plasma atmosphere containing nitrogen radicals to selectively nitridize an exposed surface of the conductive films
Data Source
AI summary
In a nonvolatile semiconductor memory device, a tunnel insulating layer, a charge storage layer and a charge block layer are formed on a silicon substrate in this order, and a plurality of control gate electrodes are provided above the charge block layer. Moreover, a cap layer made of silicon nitride is formed between the charge block layer and each of the control gate electrode, the cap layer being divided for each gate control electrode.