MONOS Memory Charge Trapping Layer Defect Engineering
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Solution Overview
Problem
MONOS memory devices face challenges in adjusting threshold voltage for NAND type flash memory applications, experiencing issues with threshold voltage variation, write/erase endurance, data retention, and over-erasing capabilities due to limitations in electron trap levels and field relaxation in alumina-based insulating films.
Innovation Solution
The reforming of alumina-based insulating films to incorporate specific defect pairs and levels, such as interstitial oxygen and tetravalent cation complexes, or oxygen vacancies and nitrogen substitutions, within the charge trapping layers to optimize electron trapping and detrapping properties, enabling efficient writing, erasing, and retention of charge, as well as over-erasing capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the film thickness of the block insulating film is increased to inhibit high field leak current, then the leakage current is reduced, but the EOT increases which deteriorates the memory performance
Solution Approach 1:
The patent introduces defect levels in the alumina-based insulating film by controlling oxygen vacancies and interstitial atoms, changing the electrical parameters of the material to achieve both high breakdown voltage and low EOT simultaneously
Solution Approach 2:
The patent uses alumina-based insulating film with controlled defect structures as a composite material system, combining the high dielectric constant of alumina with engineered defect levels to achieve both leakage current inhibition and low EOT
2Manufacturing precision
If the threshold voltage is adjusted by changing dopant impurity concentration in the channel region, then the threshold voltage control is improved, but the short channel effects increase which deteriorates device performance
Solution Approach 1:
The patent changes the approach from adjusting dopant concentration to adjusting the defect level structure in the insulating film, using oxygen vacancies and interstitial atoms to control threshold voltage without affecting channel doping
Solution Approach 2:
The patent introduces defect levels in the insulating film as an intermediary mechanism to control threshold voltage, mediating between the control gate and channel without requiring changes to the channel doping profile
3Manufacturing precision
If the film thickness of the charge trapping layer is thinned to decrease EOT, then the EOT is reduced improving memory performance, but the trapping density must be increased which complicates the manufacturing process
Solution Approach 1:
The patent changes the material composition and defect structure of the alumina-based insulating film to achieve high trapping density in a thin film, using controlled oxygen vacancies and interstitial atoms to enhance trapping capability without increasing film thickness
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the adjustment of charge-trapping/detrapping characteristics, enhancing the electric field relaxation, writing/erasing efficiency, and data retention in MONOS type memory devices, specifically improving the threshold voltage control and over-erasing capabilities required for NAND type flash memory.
Implementation Method 1
an insulating film containing Al and O as major elements and having a defect pair formed as a complex of an interstitial O atom and a tetravalent cationic atom substituting for an Al atom, or a defect pair formed as a complex of an oxygen vacancy and N atom(s) substituting for an O atom
Data Source
AI summary
A MONOS type non-volatile semiconductor memory device which is capable of electrically writing, erasing, reading and retaining data, the memory device including source/drain regions, a first gate insulating layer, a first charge trapping layer formed on the first gate insulating layer, a second gate insulating layer formed on the first charge trapping layer, and a controlling electrode formed on the second gate insulating layer. The first charge trapping layer includes an insulating film containing Al and O as major elements and having a defect pair formed of a complex of an interstitial O atom and a tetravalent cationic atom substituting for an Al atom, the insulating film also having electron unoccupied levels within the range of 2 eV-6 eV as measured from the valence band maximum of Al2O3.