Split Gate MONOS Memory Gate Electrode Sidewall Perpendicularity
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Solution Overview
Problem
Miniaturization of semiconductor devices with split gate type MONOS memory cells leads to difficulties in maintaining the required shape of the memory gate electrode, resulting in degradation of device characteristics and reliability due to uneven height and reduced perpendicularity of the sidewall.
Innovation Solution
A method involving the formation of a polysilicon film pattern between a first polysilicon film and a dummy gate electrode via an ONO film, followed by removal of the dummy gate electrode, to create a memory gate electrode with improved perpendicularity and uniform sidewall film thickness, ensuring consistent height and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the heights of the selection gate electrode and the memory gate electrode are reduced for miniaturization, then the device size is reduced, but the shape required for the memory gate electrode cannot be ensured, resulting in degradation of characteristics and reliability
Solution Approach 1:
The patent applies preliminary action by forming the ONO film and the memory gate electrode pattern before removing the dummy gate electrode. This sequence ensures that the memory gate electrode is formed with proper perpendicularity and uniform thickness from the beginning, rather than attempting to correct shape issues after the fact. The dummy gate electrode serves as a temporary structure that guides the formation of the final memory gate electrode with the required geometric precision.
Solution Approach 2:
The dummy gate electrode acts as an intermediary structure that facilitates the formation of the memory gate electrode with the correct shape. By using the dummy gate electrode as a temporary placeholder and pattern guide, the process ensures that the memory gate electrode achieves the required perpendicularity and uniform thickness. The dummy structure is removed after serving its purpose as a formation template, leaving the precisely-shaped memory gate electrode behind.
2Volume of moving object
If the heights of the selection gate electrode and the memory gate electrode are reduced for miniaturization, then the device size is reduced, but the perpendicularity of the sidewall and uniformity of film thickness deteriorate
Solution Approach 1:
The ONO film is formed preliminarily before the memory gate electrode, creating a foundation that ensures proper film thickness and perpendicularity. This preliminary formation of the insulating layer provides a stable base that maintains geometric precision even when the overall device height is reduced for miniaturization.
Solution Approach 2:
The dummy gate electrode serves as an intermediary that defines the sidewall geometry during the formation process. By using this temporary structure as a pattern guide, the memory gate electrode inherits the perpendicularity and uniformity of the dummy structure, ensuring consistent shape characteristics even at reduced dimensions.
3Quantity of substance
If the memory gate electrode shape is not maintained properly during miniaturization, then device density increases, but impurity ion penetration occurs and reliability decreases
Solution Approach 1:
The memory gate electrode is formed preliminarily with the correct shape and dimensions before subsequent processing steps. This preliminary formation ensures that the electrode maintains its protective geometry, preventing impurity ion penetration during later ion implantation processes while still allowing for high device density through miniaturization.
Solution Approach 2:
The dummy gate electrode acts as an intermediary that ensures the memory gate electrode achieves the proper protective shape. By using the dummy structure as a template, the final memory gate electrode maintains the geometric integrity needed to block impurity ions, thereby preserving reliability even as device dimensions are reduced to increase density.
Data Source
AI summary
The improvement of the reliability of a semiconductor device having a split gate type MONOS memory is implemented. An ONO film and a second polysilicon film are sequentially formed so as to fill between a first polysilicon film and a dummy gate electrode. Then, the dummy gate electrode is removed. Then, the top surfaces of the first and second polysilicon films are polished, thereby to form a memory gate electrode formed of the second polysilicon film at the sidewall of a control gate electrode formed of the first polysilicon film via the ONO film. As a result, the memory gate electrode high in perpendicularity of the sidewall, and uniform in film thickness is formed.