MONOS Memory Gate Insulation for Short Circuit Prevention

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Solution Overview

Problem

In semiconductor devices with a MONOS type nonvolatile memory cell, there is a risk of short circuits between the selection gate electrode and the memory gate electrode due to the exposure of the upper surface of the selection gate electrode, leading to degradation in reliability.

Innovation Solution

The upper surface of the selection gate electrode, except for the shunt portion, is covered with a cap insulating film, and the memory gate electrode is terminated on the cap insulating film side, preventing direct contact and potential short circuits by forming the memory gate electrode adjacent to the selection gate electrode's cap insulating film.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the upper surface of the selection gate electrode is covered with an insulating film to prevent short circuits, then electrical insulation is improved, but the plug connection to the selection gate electrode becomes difficult

Engineering Contradiction:
Improveelectrical insulationVSAvoidplug connection
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The insulating film is segmented into two regions: a first insulating film covering the upper surface of the selection gate electrode in the memory region, and a second insulating film covering the upper surface in the shunt region. This segmentation allows the plug to connect to the selection gate electrode through the second insulating film while the first insulating film maintains electrical insulation in the memory region.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different insulating film configurations are applied to different regions: the memory region has complete coverage with the first insulating film for insulation, while the shunt region has the second insulating film that allows plug penetration. This local differentiation resolves the contradiction between insulation and connectability.

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If the upper surface of the selection gate electrode is exposed in the shunt region for plug connection, then ease of manufacturing is improved, but the risk of short circuit between selection gate electrode and memory gate electrode increases

Engineering Contradiction:
Improveplug connectionVSAvoidshort circuit prevention
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The second insulating film acts as an intermediary that allows the plug to penetrate through to the selection gate electrode while maintaining insulation between the selection gate electrode and the memory gate electrode. The silicide layer formed on the exposed selection gate electrode surface also serves as an intermediary conductive layer that facilitates plug connection while the insulating film prevents short circuits.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If the memory gate electrode is formed adjacent to the exposed selection gate electrode, then device density is improved, but short circuit risk increases due to proximity

Engineering Contradiction:
Improvedevice densityVSAvoidshort circuit prevention
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The insulating film (first insulating film) positioned between the selection gate electrode and the memory gate electrode serves as a mediator that prevents direct contact and potential short circuits while allowing the electrodes to be formed adjacent to each other for high device density.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9520504B2Semiconductor device and method of manufacturing the same
Publication Date: 2016.12.13 RENESAS ELECTRONICS CORP
  • US9520504B2 patent drawing
  • US9520504B2 patent drawing
  • US9520504B2 patent drawing

AI summary

In an MONOS-type memory cell with a split gate structure, short circuit between a selection gate electrode and a memory gate electrode is prevented, and reliability of a semiconductor device is improved. In a MONOS memory having a selection gate electrode and a memory gate electrode that are adjacent to each other and that extend in a first direction, an upper surface of the selection gate electrode in a region except for a shunt portion at an end portion of the selection gate electrode in the first direction is covered with a cap insulating film. The memory gate electrode is terminated on the cap insulating film side with respect to a border between the cap insulating film and an upper surface of the shunt portion exposed from the cap insulating film.