MONOS Sidewall Spacer Multilayer Structure for Charge Retention
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor memory devices with a MONOS structure face challenges in charge retention characteristics, especially at high temperatures, due to insufficient electric fields in the vertical direction, leading to potential loss of stored data.
Innovation Solution
The implementation of sidewall spacers with a multilayer structure, including a charge storage silicon nitride film and an electrically charged mask oxide film, creates a vertical electric field that ensures hot carriers are effectively trapped in the charge storage layer, enhancing charge retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional MONOS structure with a silicon nitride film sandwiched between two silicon oxide films is used, then the device achieves miniaturization and two bits per cell storage capability, but charge retention characteristics deteriorate at high temperatures due to insufficient vertical electric fields
Solution Approach 1:
The patent introduces sidewall spacers with multilayer structures on both sides of the floating gate electrode, creating a three-dimensional configuration. This adds vertical dimensionality to the electric field distribution, generating strong vertical electric fields that were insufficient in the conventional planar MONOS structure. The sidewall spacers extend vertically from the semiconductor substrate surface, enabling effective charge trapping even at high temperatures by directing hot carriers vertically into the charge storage region.
Solution Approach 2:
The sidewall spacers are constructed as composite multilayer structures comprising a first insulation film (silicon oxide), a charge storage insulation film (silicon nitride), and a second insulation film (silicon oxide). This composite structure combines materials with different electrical properties: the silicon oxide films provide insulation and field control, while the silicon nitride film provides charge storage capability. The combination creates both vertical and lateral electric fields that work synergistically to improve charge retention characteristics at high temperatures.
2Loss of information
If hot carriers are generated to penetrate the first silicon oxide film for charge storage, then data writing is achieved, but charge retention is lost at high temperatures due to lack of vertical electric field confinement
Solution Approach 1:
The sidewall spacers create vertical electric field components that extend upward from the semiconductor substrate, adding a vertical dimension to carrier confinement. This vertical field configuration prevents hot carriers from escaping laterally at high temperatures by directing them vertically into the charge storage region and confining them there through the combined vertical and lateral field effects of the multilayer sidewall structure.
Solution Approach 2:
The multilayer sidewall spacer structure is pre-configured to provide both vertical and lateral electric field components before hot carriers are generated. This beforehand field configuration acts as a protective cushion that prevents carrier escape at high temperatures by establishing field confinement pathways that guide carriers into and retain them within the charge storage region, counteracting thermal effects before they can cause charge loss.
3Ease of manufacture
If a simple silicon nitride film structure is used for charge storage, then manufacturing is simplified, but the vertical electric field is insufficient to trap hot carriers effectively at high temperatures
Solution Approach 1:
The sidewall spacers use a composite multilayer structure of silicon oxide and silicon nitride films, which are standard materials in semiconductor manufacturing. The fabrication process employs conventional deposition and etching techniques to create the multilayer configuration. While the structure is more complex than a single film, it remains compatible with existing manufacturing capabilities and achieves superior charge trapping efficiency through the synergistic electric field effects of the composite material arrangement.
Solution Approach 2:
The charge storage function is segmented into multiple functional layers within the sidewall spacers: the first silicon oxide film provides insulation and field control, the silicon nitride film provides charge storage, and the second silicon oxide film provides additional insulation and field shaping. This segmentation of functions into distinct layers enables each material to optimize its specific role, improving overall charge trapping efficiency while maintaining manufacturing feasibility through standardized layer-by-layer fabrication processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves charge retention characteristics by ensuring hot carriers are accurately directed and trapped in the charge storage layer, maintaining data integrity even at high temperatures.
Implementation Method 1
creates a vertical electric field that ensures hot carriers are effectively trapped in the charge storage layer
Implementation Method 2
Writing data to the silicon nitride film described above can be conducted by impressing writing potentials to the floating gate electrode and to a drain region... By impressing voltages in this way, a channel is formed in the semiconductor layer underneath the floating gate electrode, and carriers bursting out of the drain region flow into this channel. These carriers turn into hot carriers by being accelerated on the side of the source region. The hot carriers generated here penetrate through the first silicon oxide film functioning as a potential barrier.
Data Source
AI summary
A method of manufacturing a semiconductor memory device comprises the steps of: preparing a semiconductor substrate having a gate insulation film and a gate electrode, the gate insulation film being formed on a predetermined active region in the semiconductor substrate, and the gate electrode being formed on the gate insulation film; forming a first insulation film covering the gate electrode and at least a part of the semiconductor substrate; charging the first insulation film; and forming a second insulation film for charge storage on the first insulation film.