Monotonic Counter Memory Split for Replay Attack Protection
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Solution Overview
Problem
Systems-on-Chip (SoCs) with limited internal non-volatile memory face challenges in storing a high number of unique monotonic counter values, which are essential for ensuring data freshness and preventing replay attacks, while external memory access introduces security risks.
Innovation Solution
A trusted monotonic counter system that efficiently uses internal and external non-volatile memory by splitting the counter value into a base value stored externally and an offset value stored in limited internal OTP memory, with mechanisms for power cycle resilience and secure updates, ensuring unique numbers are generated without repeating values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If all counter values are stored in external non-volatile memory, then the maximum counter value can be high, but security risks increase due to external memory access
Solution Approach 1:
The counter value is segmented into two parts: a base value stored in external non-volatile memory and an offset value stored in internal secure non-volatile memory. This segmentation allows the system to achieve a high maximum counter value (by storing the base value externally) while maintaining security (by storing the critical offset value internally in secure memory that is harder to access or tamper with).
2Object-affected harmful factors
If counter values are stored in internal non-volatile memory, then security is improved, but the maximum counter value is limited by memory capacity
Solution Approach 1:
The counter value is divided into a base value (stored externally) and an offset value (stored internally in secure memory). The internal secure memory stores only the offset portion, which provides security while the external memory stores the base value to achieve a high maximum counter value that exceeds internal memory capacity.
3Object-affected harmful factors
If the entire counter value is stored in internal memory, then security against external attacks is improved, but the counter life is reduced due to limited memory writes
Solution Approach 1:
The counter value is segmented into base value (external memory) and offset value (internal secure memory). Only the offset value is stored in internal memory, which has limited write cycles, thereby extending counter life. The base value in external memory handles the bulk of the counting range, reducing wear on internal memory.
4Duration of action of stationary object
If offset value bits are increased to extend counter life, then counter life is improved, but internal memory usage increases
Solution Approach 1:
Instead of storing the full counter value in internal memory, only a partial portion (the offset value with fewer bits than the total counter value) is stored internally. This partial storage approach extends counter life by reducing internal memory writes while still providing security, accepting that some counting capacity is handled externally.
Data Source
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AI summary
A device, including: an unsecure non-volatile memory; a secure device including: a processor; and a secure non-volatile memory; wherein the secure device is configured to: calculate a TMC value from an offset and a base value; store a TMC version value in the secure non-volatile memory and the insecure non-volatile memory, wherein the TMC version value is updated when TMC value is incremented the first time after the secure device is powered up; store the base value in the unsecure non-volatile memory; store the offset value in the unsecure non-volatile memory when the secure device is in a system power down state; store the offset value in the secure non-volatile memory when the secure device is in a rescue state; and store a TMC link value in the unsecure memory, wherein the TMC link value is based upon the base value and TMC version value stored in the unsecure memory.