Monotonic Counter Segmented Storage for Memory Reliability
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Solution Overview
Problem
Traditional memory devices are limited in efficiently tracking count values due to high memory and system resource usage, and are vulnerable to power loss events and malicious actions.
Innovation Solution
The implementation of monotonic counters with robust read and write capabilities and fault tolerance for power loss events, using a combination of local and global counters to dynamically compute full count values with reduced memory usage and enhanced security.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional memory devices are used to store count values, then the count values can be tracked, but the memory usage and system resource usage increase significantly
Solution Approach 1:
The counter is divided into multiple segments, each storing only a portion of the count value. Instead of storing the complete count value in memory, the counter uses segmented storage where each segment holds a partial value, significantly reducing the memory footprint while maintaining the ability to track high count values through coordinated segment updates
Solution Approach 2:
The counter transitions from a traditional single-dimension memory storage approach to a multi-dimensional structure combining local register storage, segment storage, and carry logic. This dimensional transformation allows the system to track count values using a combination of fast local registers and minimal memory segments, reducing overall memory usage while maintaining tracking capability
2Reliability
If higher capacity counters are implemented to track larger count values, then the counting range increases, but the memory required to store count values increases
Solution Approach 1:
The counter is divided into multiple segments, each storing only a portion of the count value. Instead of storing the complete count value in memory, the counter uses segmented storage where each segment holds a partial value, significantly reducing the memory footprint while maintaining the ability to track high count values through coordinated segment updates
Solution Approach 2:
The counter implements a nested structure where multiple smaller counters (segments) are combined to form a larger counting capability. Each segment counter is nested within the overall counter system, and their combined values through carry logic achieve the equivalent of a single large counter with minimal memory requirements
3Productivity
If traditional counters are used, then count operations can be performed, but the counters are vulnerable to power loss events and data corruption
Solution Approach 1:
The counter performs preliminary actions by continuously maintaining updated count values in local registers and segment storage before power loss can occur. The carry logic and segment update mechanisms ensure that count state is preserved in non-volatile or backup storage positions, preventing data corruption from power loss events
Solution Approach 2:
The counter implements protective mechanisms by maintaining redundant count state information in multiple locations (local registers, segment storage, and backup positions). This cushioning approach ensures that if power is lost during an operation, the count data is protected from corruption because updated values are already preserved in safe storage positions
Data Source
AI summary
Systems, methods, and devices implement counters with fault tolerance and power loss protection. Systems include a non-volatile memory device that includes a first counter configured to store a first plurality of data values representing a plurality of count operations, and a second counter configured to store a second plurality of data values representing an initiation and a completion of each erase operation performed on the first counter. Systems also include control circuitry configured to generate a count value based on a current counter value of the first counter, a current counter value of the second counter, and at least one physical parameter of the first counter.