Montgomery Multiplier Using Extended Operand Bits
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current Montgomery multiplication algorithms require repetitive operations and a final modulo correction step, which is computationally expensive and vulnerable to security breaches, especially when dealing with large operands in RSA cryptosystems.
Innovation Solution
A Montgomery multiplication apparatus (MMA) with a pre-compute circuit and Montgomery multiplication circuit that computes a pre-compute value through iterative bit-wise operations, eliminating the need for a final modulo correction by using operands with two additional bits, thereby avoiding overflow and enhancing security.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the final modulo correction step is performed in Montgomery multiplication, then the multiplication result is accurate, but the computational complexity and security vulnerability increase
Solution Approach 1:
The patent applies preliminary action by extending the operand bit-width by 2 bits before multiplication. This pre-computation approach ensures that the intermediate sum never overflows during the Montgomery reduction process, thereby eliminating the need for the final modulo correction step. The extended bit-width is maintained throughout the calculation, and the result is subsequently truncated to the original bit-width, achieving both accuracy and efficiency.
2Measurement precision
If the final modulo correction step is performed, then the multiplication result is accurate, but the security against side-channel attacks deteriorates
Solution Approach 1:
The patent applies preliminary action by extending the operand bit-width by 2 bits before multiplication. This pre-computation approach ensures that the intermediate sum never overflows during the Montgomery reduction process, thereby eliminating the need for the final modulo correction step. The extended bit-width is maintained throughout the calculation, and the result is subsequently truncated to the original bit-width, achieving both accuracy and efficiency.
3Reliability
If traditional Montgomery multiplication is used, then the algorithm is well-established, but the computational load and operation time increase
Solution Approach 1:
The patent applies preliminary action by extending the operand bit-width by 2 bits before multiplication. This pre-computation approach ensures that the intermediate sum never overflows during the Montgomery reduction process, thereby eliminating the need for the final modulo correction step. The extended bit-width is maintained throughout the calculation, and the result is subsequently truncated to the original bit-width, achieving both accuracy and efficiency.
Solution Approach 2:
The patent applies the extraction principle by removing the final modulo correction step from the traditional Montgomery multiplication algorithm. By eliminating this computationally expensive operation through the preliminary bit-extension approach, the patent reduces the overall computational load and operation time while maintaining result accuracy.
4Device complexity
If operands are extended by 2 bits, then the final modulo correction is eliminated, but the initial storage and processing requirements increase
Solution Approach 1:
The patent applies preliminary action by extending the operand bit-width by 2 bits before multiplication. This pre-computation approach ensures that the intermediate sum never overflows during the Montgomery reduction process, thereby eliminating the need for the final modulo correction step. The extended bit-width is maintained throughout the calculation, and the result is subsequently truncated to the original bit-width, achieving both accuracy and efficiency.
Data Source
AI summary
An Integrated Montgomery Calculation Engine (IMCE), for multiplying two multiplicands modulo a predefined number, includes a Carry Save Adder (CSA) circuit and control circuitry. The CSA circuit has multiple inputs, and has outputs including a sum output and a carry output. The control circuitry is coupled to the inputs and the outputs of the CSA circuit and is configured to operate the CSA circuit in at least (i) a first setting that calculates a Montgomery precompute value and (ii) a second setting that calculates a Montgomery multiplication of the two multiplicands.