Morphic SSD Block Allocation for Retention and Performance

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Solution Overview

Problem

Flash memory devices face challenges in adjusting their operation to meet varying application requirements for retention time and performance, as existing systems often provide long retention times that are not advantageous for applications needing short retention times, leading to degraded performance.

Innovation Solution

A solid state drive with a morphic engine that includes a wear-out tracker, raw bit error rate tracker, and retention predictor, which selects suitable physical flash memory blocks based on application requirements by calculating average response time and estimated retention time, and allocates storage space using incremental step pulse programming methods and shallow or normal erase processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If flash memory operates with long retention time configuration, then data retention reliability is improved, but performance and response time deteriorate

Engineering Contradiction:
Improvedata retention reliabilityVSAvoidperformance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The flash memory system dynamically adjusts retention time based on application requirements. The controller monitors usage patterns and automatically modifies retention parameters, transitioning between long and short retention modes to optimize both reliability and performance for different workloads.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes operational parameters including retention time, programming voltage, and erase methodology based on detected application needs. By modifying these parameters dynamically, the system achieves long retention when required and short retention for high-performance scenarios.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If flash memory uses aggressive programming and erase cycles to improve performance, then response time is improved, but device longevity and reliability worsen

Engineering Contradiction:
Improveresponse timeVSAvoiddevice longevity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system adjusts programming and erase parameters based on application requirements and device wear state. For performance-critical operations, more aggressive parameters are used temporarily, while the controller monitors wear and reduces aggressiveness when reliability becomes a concern, achieving a dynamic balance between speed and longevity.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The controller implements feedback mechanisms that monitor device wear, programming cycle counts, and erase cycle counts. This feedback informs subsequent programming and erase operations, preventing excessive wear while maintaining acceptable performance levels through adaptive parameter selection.

Inventive Principle:
Principle #23Feedback

3Device complexity

If flash memory allocates storage space without considering application requirements, then device complexity is reduced, but adaptability to different applications worsens

Engineering Contradiction:
Improvestorage allocation complexityVSAvoidadaptability to application requirements
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The system applies different storage characteristics to different regions or allocations based on application requirements. Rather than uniform treatment, the controller identifies specific application needs and tailors retention time, programming speed, and erase methodology to each allocation, achieving local optimization without overwhelming complexity.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The flash memory is segmented into different operational zones or allocation types, each optimized for specific application requirements. The controller divides storage management into distinct categories (performance-optimized, retention-optimized, balanced) allowing simplified management within each segment while providing overall versatility.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10489076B2Morphic storage device
Publication Date: 2019.11.26 SAMSUNG ELECTRONICS CO LTD
  • US10489076B2 patent drawing
  • US10489076B2 patent drawing
  • US10489076B2 patent drawing

AI summary

A solid state drive with a capability to select physical flash memory blocks and erasure and programming methods according to requirements of an application using storage in the solid state drive. A wear-out tracker in the solid state drive counts programming and erase cycles, and a raw bit error rate tracker in the solid state drive monitors raw bit errors in data read from the solid state drive. The application provides, to the solid state drive, requirements on an allowable retention time, corresponding to the anticipated storage time of data stored by the application, and on an average response time corresponding to programming and read times for the flash memory. The solid state drive identifies physical flash memory blocks suitable for meeting the requirements, and allocates storage space to the application from among the identified physical flash memory blocks.