MOS Transistor Bias Control for Nth-Order Distortion Reduction
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Solution Overview
Problem
Existing transistor circuits face challenges in minimizing distortion, particularly in high-frequency RF designs with non-constant envelope modulation schemes, where traditional biasing circuits require many components and do not effectively cancel specific Nth-order distortion.
Innovation Solution
A biasing circuit and method that utilize a replica transistor, continuous wave signals, and a mixer to determine and adjust the bias voltage based on Nth-order distortion components, minimizing distortion by generating a DC component proportional to the distortion and using a feedback loop to adjust the bias voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional biasing circuits are used to compensate for distortion, then distortion compensation is achieved, but the number of components increases and circuit layout becomes problematic
Solution Approach 1:
The patent uses a replica transistor that copies the electrical characteristics of the main transistor to measure distortion. By creating a simplified replica version rather than using complex biasing circuits with multiple components, the patent achieves distortion measurement while reducing overall circuit complexity
Solution Approach 2:
The patent introduces a mixer as an intermediary device that converts the distortion measurement from the replica transistor into a usable error signal. This mediator enables automatic bias adjustment without requiring complex direct measurement and control circuits
2Reliability
If feedback circuits are used to reduce distortion, then linearity improves, but the overall gain of the circuit decreases
Solution Approach 1:
The patent applies preliminary action by pre-distorting the bias point using the measured error signal before the main signal processing occurs. This allows the circuit to operate at an optimized bias point that inherently reduces distortion without requiring heavy feedback that would reduce gain
Solution Approach 2:
The patent segments the distortion compensation function into a separate measurement path using the replica transistor and mixer, independent from the main signal amplification path. This allows distortion reduction to be achieved without the feedback loop that would otherwise attenuate the main signal
3Stability of the object's composition
If active biasing circuits are used to maintain fixed transconductance ratio, then temperature stability improves, but specific Nth-order distortion cancellation is not achieved
Solution Approach 1:
The patent dynamically changes the bias parameter based on the measured distortion level rather than maintaining a fixed transconductance ratio. By adjusting the bias point according to the actual distortion measurement from the replica transistor, the system achieves specific Nth-order distortion cancellation while adapting to temperature variations
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces Nth-order distortion in transistor circuits with fewer components, improving linearity and reducing circuit layout issues, while maintaining reasonable gain without excessive power dissipation.
Implementation Method 1
a mixer for mixing the output signal with the second CW signal to obtain a mixed signal having a DC component with an intensity proportional to a value of the Nth-order distortion component
Data Source
AI summary
A biasing circuit and method for minimizing distortion in a MOS transistor. A first CW source provides a first CW signal at the input of a replica transistor to obtain an output signal at the output of the replica transistor. The output signal is mixed with another CW signal having a frequency equal to N times that of the first CW signal, N being an integer greater than one, to obtain a mixed signal having a DC component with an intensity proportional to the Nth-order distortion present in the output signal. A bias voltage to minimize this distortion is then applied to the input of the original transistor on which the replica transistor is based, the bias voltage determined in accordance with the intensity of the DC component.