MOS-Bipolar Integration Layout for Fewer Masks and Higher Gain
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Solution Overview
Problem
The manufacturing of microelectronic devices combining MOS transistors and bipolar transistors is complicated by the different structures and manufacturing steps required for each, leading to increased duration and cost.
Innovation Solution
A microelectronic device and method where a high-voltage MOS transistor and a bipolar transistor are integrated on the same substrate, sharing manufacturing steps, with the bipolar transistor's base formed in a well doped more lightly than a low-voltage MOS transistor's well, allowing for improved current gain without additional specific steps, and using a single mask for some doping steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If different manufacturing steps and specific masks are used for MOS transistors and bipolar transistors, then each transistor type can be manufactured with optimal structure, but the manufacturing process becomes complicated and duration increases
Solution Approach 1:
The patent merges the manufacturing processes for MOS transistors and bipolar transistors into a single integrated process. Both transistor types are formed in the same semiconductor substrate using shared manufacturing steps, including common doping processes and mask patterns, thereby reducing process complexity while maintaining structural precision for both device types
Solution Approach 2:
The manufacturing process is designed to be universal, where a single set of manufacturing steps and masks serves dual purposes: forming MOS transistors in first regions and bipolar transistors in second regions of the substrate. This multi-functional approach eliminates the need for separate specialized processes for each transistor type
2Manufacturing precision
If different manufacturing steps and specific masks are used for MOS transistors and bipolar transistors, then each transistor type can be manufactured with optimal structure, but production cost increases
Solution Approach 1:
The patent combines the manufacturing sequences for MOS and bipolar transistors into a unified process flow. By merging previously separate manufacturing steps into a single integrated process using common masks and doping procedures, the patent reduces the total number of production steps required, thereby lowering manufacturing costs while preserving the structural precision needed for both transistor types
3Reliability
If separate manufacturing processes are used for high-voltage MOS transistors and bipolar transistors, then each device can achieve optimal performance, but production time increases
Solution Approach 1:
The patent performs preliminary actions by establishing a unified manufacturing framework that anticipates the formation of both high-voltage MOS transistors and bipolar transistors simultaneously. The process includes preliminary doping steps and mask preparations that are configured to create both device types in parallel, eliminating the need for sequential separate manufacturing and thereby reducing production time while maintaining device performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This integration simplifies the manufacturing process, enhances the current gain of the bipolar transistor, and reduces the need for specific masks and steps, thereby decreasing production time and cost while maintaining high-voltage capabilities.
Implementation Method 1
a first well doped with a first type... two first regions doped with a second type opposite to the first type... a second well doped with the second type... a second region doped with the first type... a third region doped with the first type
Data Source
AI summary
A device includes a MOS transistor and a bipolar transistor at a same first portion of a substrate. The first portion includes a first well doped with a first type forming the channel of the MOS transistor and two first regions doped with a second type opposite to the first type that are arranged in the first well which form the source and drain of the MOS transistor. The first portion further includes: a second well doped with the second type that is arranged laterally with respect to the first well to form the base of the bipolar transistor; a second region doped with the first type that is arranged in the second well to form the emitter of the bipolar transistor; and a third region doped with the first type that is arranged under the second well to form the collector of the bipolar transistor.