MOS Buffer Substrate Regulation to Block Parasitic Diode Leakage

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Solution Overview

Problem

In large-scale electronic circuitry systems, mixed-voltage input/output buffer circuits can experience leakage currents due to parasitic diodes being forward biased when the voltage output exceeds the voltage source level, leading to undesirable power consumption and device damage.

Innovation Solution

A buffer circuit with a regulating function is implemented, utilizing a combination of metal-oxide-semiconductor transistors and inverters to ensure that the voltage level at the substrate of the buffer circuit is regulated to match either the voltage source or output voltage, preventing parasitic diode forward biasing by connecting the substrate to a node that reflects the larger voltage level.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the voltage output terminal is directly connected to the drain terminal of the metal-oxide-semiconductor transistor, then the buffer circuit can transmit signals, but leakage current occurs when the output voltage exceeds the source voltage due to parasitic diode forward biasing

Engineering Contradiction:
Improvesignal transmission capabilityVSAvoidleakage current
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent introduces a regulating circuit as an intermediary between the voltage source and the substrate of the metal-oxide-semiconductor transistor. This regulating circuit includes additional metal-oxide-semiconductor transistors that control the substrate voltage to prevent parasitic diode forward biasing, thereby eliminating leakage current while maintaining signal transmission capability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the voltage parameter at the substrate by dynamically adjusting it through the regulating circuit. By controlling the substrate voltage to match or exceed the output voltage when necessary, the parasitic diode remains reverse-biased or at equilibrium, preventing leakage current generation.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a regulating circuit is added to prevent leakage current, then power consumption is reduced and device damage is prevented, but the circuit complexity increases

Engineering Contradiction:
Improvedevice protectionVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The regulating circuit is designed to perform multiple functions: it regulates the substrate voltage to prevent leakage current, protects the device from damage, and maintains signal transmission capability. By integrating these functions into a unified circuit structure, the patent reduces overall complexity compared to separate protection mechanisms.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The regulating circuit automatically adjusts the substrate voltage based on the output voltage conditions without requiring external control signals. The circuit self-regulates to prevent leakage current and protect the device, eliminating the need for additional control logic or monitoring systems.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS8593184B2Buffer circuit with regulating function and regulating circuit thereof
Publication Date: 2013.11.26 MARLIN SEMICON LTD
  • US8593184B2 patent drawing
  • US8593184B2 patent drawing
  • US8593184B2 patent drawing

AI summary

A regulating circuit is used with a buffer circuit. The buffer circuit at least includes a metal-oxide-semiconductor transistor and a voltage output terminal. The voltage output terminal is connected to a drain terminal of the metal-oxide-semiconductor transistor of the buffer circuit. The regulating circuit includes a first metal-oxide-semiconductor transistor and a second metal-oxide-semiconductor transistor. The first metal-oxide-semiconductor transistor has a source terminal and a drain terminal connected to a voltage source and a connecting node, respectively. The connecting node is electrically connected to a substrate of the metal-oxide-semiconductor transistor of the buffer circuit. The second metal-oxide-semiconductor transistor has a drain terminal and a source terminal connected to the connecting node and the voltage output terminal, respectively. A substrate of the second metal-oxide-semiconductor transistor is electrically connected to the connecting node.