MOS Device Voltage Tolerance via Capacitive Divider

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Solution Overview

Problem

MOS transistors face gate oxide failure due to high voltage signals, with conventional high voltage tolerant circuits requiring complex bias generation and additional IC fabrication steps, and existing solutions like stacked MOS devices are costly and area-inefficient.

Innovation Solution

A capacitive voltage divider arrangement is coupled to a MOS transistor to attenuate high voltage signals, using standard CMOS processing technology without the need for stacking or increasing gate oxide thickness, allowing for improved voltage tolerance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the gate oxide thickness is increased to accommodate higher voltage, then voltage tolerance is improved, but additional IC fabrication steps are required which increase cost

Engineering Contradiction:

Improvevoltage toleranceVSAvoidfabrication cost

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

A capacitor is introduced as an intermediary component between the high voltage input signal and the MOS device gate. This capacitor forms a capacitive voltage divider with the MOS device's intrinsic gate capacitance, attenuating the input signal voltage before it reaches the gate oxide, thereby protecting it from high voltage damage without requiring thicker oxide

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention changes the electrical parameters of the circuit by adding a capacitor with a specific capacitance value that creates the desired voltage attenuation ratio. By adjusting the capacitor value relative to the MOS device gate capacitance, the input signal voltage is scaled down to a safe level for the gate oxide, achieving high voltage tolerance with standard thickness oxide

Inventive Principle:

Principle #35Parameter changes

2Reliability

If stacked MOS devices are used for high voltage tolerance, then voltage distribution across devices is improved, but device complexity and area utilization worsen

Engineering Contradiction:

Improvevoltage toleranceVSAvoidcircuit complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The invention extracts the voltage attenuation function from the MOS device structure itself and places it in a separate capacitive element. Instead of using stacked MOS devices to divide and share the voltage stress, a single capacitor is used to pre-attenuate the voltage, simplifying the circuit to just one MOS device with a capacitor in series

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

A capacitor is introduced as an intermediary component between the high voltage input signal and the MOS device gate. This capacitor forms a capacitive voltage divider with the MOS device's intrinsic gate capacitance, attenuating the input signal voltage before it reaches the gate, thereby protecting it from high voltage damage without requiring thicker oxide

Inventive Principle:

Principle #24Intermediary (Mediator)

3Reliability

If stacked MOS devices are used for high voltage tolerance, then voltage tolerance is improved, but area utilization worsens

Engineering Contradiction:

Improvevoltage toleranceVSAvoidIC area

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

A capacitor is introduced as an intermediary component between the high voltage input signal and the MOS device gate. This capacitor forms a capacitive voltage divider with the MOS device's intrinsic gate capacitance, attenuating the input signal voltage before it reaches the gate, thereby protecting it from high voltage damage without requiring thicker oxide

Inventive Principle:

Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances MOS transistor voltage tolerance effectively, reducing the risk of gate oxide failure while maintaining cost-effectiveness and area efficiency, suitable for applications requiring high voltage tolerance.

Implementation Method 1

connecting at least a first capacitor in series with the MOS device, the first capacitor having a first capacitance value associated therewith... adjusting a ratio of the first capacitance value and a second capacitance value associated with the MOS device such that a second signal present at the gate of the MOS device will be an attenuated version of the first signal

Methodology Applied

Scientific EffectCapacitive voltage division: Capacitance

Data Source

PatentUS8105912B2High voltage tolerant metal-oxide-semiconductor device

Publication Date: 2012.01.31 BELL SEMICONDUCTOR LLC

AI summary

A method for increasing a voltage tolerance of a MOS device having a first capacitance value associated therewith is provided. The method includes the steps of: connecting at least a first capacitor in series with the MOS device, the first capacitor having a first capacitance value associated therewith, the first capacitor having a first terminal coupled to a gate of the MOS device and a second terminal adapted to receive a first signal; and adjusting a ratio of the first capacitance value and a second capacitance value associated with the MOS device such that a second signal present at the gate of the MOS device will be an attenuated version of the first signal. An amount of attenuation of the first signal is a function of the ratio of the first and second capacitance values.