High-Frequency Amplifier Circuit Using MOS Capacitor Bypass
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Solution Overview
Problem
Existing high-frequency semiconductor amplifier circuits require numerous switches to switch between gain and bypass modes, leading to increased circuit size and complexity, especially in multi-band applications, which complicates mode switching and increases the number of components needed.
Innovation Solution
A high-frequency semiconductor amplifier circuit design that uses a bias generation circuit to control transistors to switch between gain and bypass modes using only two transistors (FET1 and FETsw1), eliminating the need for additional switches by configuring the circuit to operate FET1 as a MOS capacitor in bypass mode, thereby reducing circuit size and complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If numerous switches are used to switch between gain and bypass modes in multi-band applications, then mode switching capability is improved, but circuit size and complexity increase
Solution Approach 1:
The amplifier circuit is designed to perform multiple functions (gain amplification and bypass) using a unified circuit structure. The same amplifier circuit handles both gain mode and bypass mode operations, eliminating the need for separate switch components. The circuit achieves multi-band compatibility and mode switching capability through bias control rather than physical switching, thereby reducing circuit complexity while maintaining adaptability.
2Adaptability or versatility
If numerous switches are used to switch between gain and bypass modes in multi-band applications, then mode switching capability is improved, but circuit size increases
Solution Approach 1:
The switching function is extracted from the physical switch components and implemented through bias control of the amplifier transistor. By removing the need for external switch components and integrating the switching capability into the amplifier's bias control mechanism, the circuit size is reduced while maintaining mode switching functionality.
3Power
If FET1 is operated as an amplifier in gain mode, then gain performance is improved, but noise figure deteriorates when operated as MOS capacitor in bypass mode
Solution Approach 1:
The operating parameters of FET1 are dynamically changed based on the desired mode. In gain mode, the bias voltage is set to enable amplification with optimal gain performance. In bypass mode, the bias voltage is adjusted to operate FET1 as a MOS capacitor, achieving low noise figure. This parameter adjustment allows the same component to optimize performance for different operational modes without physical reconfiguration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design allows for efficient mode switching between gain and bypass modes with minimal additional components, reducing circuit size and maintaining excellent noise figure and gain performance across multiple frequency bands.
Implementation Method 1
A first transistor on a semiconductor on insulator (SOI) substrate amplifies a high-frequency input signal
Implementation Method 2
the above-described mode switching can be performed using only two transistors... by configuring the circuit to operate FET1 as a MOS capacitor in bypass mode
Data Source
AI summary
According to an embodiment, a high-frequency semiconductor amplifier circuit includes an input terminal and an output terminal. A gate of a first transistor is connected to the input terminal. A drain of the first transistor is connected to the output terminal. A second transistor is connected between a source of the first transistor and a reference potential terminal. A bias generation circuit has an input control signal terminal, a bias voltage terminal connected to the gate of the first transistor, a control voltage terminal connected to a gate of the second transistor, and an intermediate voltage terminal connected to the drain of the first transistor. The bias generation circuit supplies a control voltage, a bias voltage, and a first voltage according to the input control signal.