MOS Capacitor Arrays for Multi-Band RF Tuning
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Solution Overview
Problem
Current wireless devices face challenges in efficiently communicating over multiple frequency bands due to the complexity of multi-band communication, particularly when using carrier aggregation, as existing solutions like multi-throw switches and duplexers result in increased size, cost, and insertion loss.
Innovation Solution
The development of a metal-oxide semiconductor (MOS) capacitor structure with a gate/source/drain configuration, including shared active source/drain regions, which forms a channel between each pair of source/drain regions, enabling high quality-factor and high-density variable capacitors. These capacitors are integrated into an integrated circuit (IC) using silicon on insulator (SOI) processes, allowing for programmable filtering and impedance matching without the need for multiple duplexers and switches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple duplexers and switches are used for multi-band communication, then communication capability across frequency bands is improved, but device size and complexity increase
Solution Approach 1:
The patent combines multiple capacitor banks into a single integrated variable capacitor structure that can be electronically switched between different capacitance values. Instead of using separate duplexers and switches for each frequency band, the invention integrates multiple capacitor arrays (first, second, third, and fourth capacitor banks) into one unified structure that can be controlled by a single control circuit to achieve multi-band operation.
Solution Approach 2:
The variable capacitor structure serves multiple functions simultaneously: it can operate across multiple frequency bands, provide impedance matching, and enable carrier aggregation. The single integrated structure replaces what would traditionally require multiple separate components (duplexers, switches, and capacitors), making one component perform the work of several.
2Adaptability or versatility
If multiple duplexers and switches are used for multi-band communication, then communication capability across frequency bands is improved, but insertion loss increases
Solution Approach 1:
By merging multiple capacitor banks into a single integrated variable capacitor structure with shared electrodes and dielectric layers, the invention eliminates the need for multiple separate switches and duplexers. This reduction in the number of discrete components directly reduces the cumulative insertion loss that would occur through multiple switching and signal path transitions.
3Ease of manufacture
If conventional capacitor structures are used, then manufacturing is simpler, but quality factor and density are insufficient for high-performance RF applications
Solution Approach 1:
The patent employs a composite structure combining multiple capacitor banks with different electrode configurations and dielectric materials. The first and second capacitor banks use different electrode arrangements, while the third and fourth capacitor banks incorporate additional dielectric layers. This composite approach allows the structure to achieve high quality factor and density while remaining compatible with standard semiconductor manufacturing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces the size and cost of wireless devices by eliminating the need for multiple duplexers and switches, while providing high RF voltage handling, low insertion loss, and high linearity, enabling efficient communication across various frequency bands and standards.
Implementation Method 1
A capacitor structure is described. The capacitor structure includes a substrate, a plurality of source/drain regions formed in the substrate, and a plurality of gates formed above the substrate. The plurality of gates formed above the substrate such that each of the plurality of gates is formed between each pair of source/drain regions of the plurality of source/drain regions to form a channel between each pair of source/drain regions.
Data Source
AI summary
A capacitor structure is described. The capacitor structure includes a substrate, a plurality of source/drain regions formed in the substrate, and a plurality of gates formed above the substrate. The plurality of gates formed above the substrate such that each of the plurality of gates is formed between each pair of source/drain regions of the plurality of source/drain regions to form a channel between each pair of source/drain regions.