High-Density MOS Capacitor for Silicon Photonics Integration
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Solution Overview
Problem
Current on-chip capacitors for silicon photonics elements face challenges in achieving high capacitance per unit area, with existing metal-insulator-metal (MIM) and metal-oxide-semiconductor (MOS) capacitor structures requiring high-end semiconductor processes or large areas, making them difficult to integrate into silicon photonics manufacturing processes.
Innovation Solution
A high-density capacitor design incorporating a metal-oxide-semiconductor (MOS) capacitor with a silicon layer doped to a concentration of at least 1×10^20 cm^-3, a first dielectric layer, and a first metal layer, which is manufactured using a silicon photonics chip process, allowing for increased capacitance per unit area by stacking a MOS capacitor with a metal-insulator-metal (MIM) capacitor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a MIM capacitor with high-k material or minimized metal layer distance is used to increase capacitance density, then capacitance per unit area is improved, but manufacturing complexity and process difficulty increase significantly
Solution Approach 1:
The patent changes the doping concentration parameter of the silicon layer to at least 1×10^20 cm^-3, which significantly increases the capacitance per unit area. This parameter change allows achieving high capacitance density without requiring complex high-end semiconductor processes or minimizing metal layer distances, thus resolving the contradiction between capacitance density and manufacturing complexity
Solution Approach 2:
The patent uses a standard silicon photonics chip manufacturing process that can serve multiple purposes: fabricating silicon photonics elements and manufacturing the MOS capacitor with high doping concentration. This multi-functionality allows the same production line to produce both photonic components and high-density capacitors without requiring separate complex processes, resolving the contradiction between capacitance density and manufacturing complexity
2Ease of manufacture
If a MIM capacitor with 1 micrometer metal layer distance is used, then manufacturing ease is improved, but large area is required to achieve picoFarad-level capacitance
Solution Approach 1:
The patent changes the silicon layer doping concentration to at least 1×10^20 cm^-3, which increases the capacitance per unit area by a factor of two or more compared to conventional MIM capacitors. This allows achieving the same picoFarad-level capacitance in a much smaller area while maintaining ease of manufacture using standard silicon photonics processes
Solution Approach 2:
The patent transitions from a conventional MIM capacitor structure to an MOS capacitor structure with a heavily doped silicon layer, effectively adding the dimension of doping concentration control. This dimensional change enables achieving higher capacitance density without increasing the physical area, while still using standard manufacturing processes
3Quantity of substance
If a MOS capacitor structure is used to achieve high capacitance per unit area, then capacitance density is improved, but compatibility with silicon photonics production process deteriorates
Solution Approach 1:
The patent designs the MOS capacitor to be manufactured using the same silicon photonics chip production process that fabricates photonic components. The process uses standard doping, dielectric layer formation, and metal layer deposition techniques already available in silicon photonics manufacturing, achieving both high capacitance density and process compatibility
Solution Approach 2:
The patent specifies a doping concentration of at least 1×10^20 cm^-3 for the silicon layer, which is achievable using standard phosphorus or boron doping processes in silicon photonics fabrication. This parameter specification ensures that the MOS capacitor can be manufactured using existing silicon photonics production capabilities while achieving the desired high capacitance per unit area
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves a capacitance per area that is twice that of conventional MIM capacitors, enabling efficient electrical coupling for silicon photonics elements while being compatible with silicon photonics manufacturing processes, thereby improving the integration and performance of on-chip capacitors.
Implementation Method 1
a silicon layer with a dopant concentration of at least 1×10^20 cm^-3
Implementation Method 2
A high-density capacitor including a metal-oxide-semiconductor (MOS) capacitor
Data Source
AI summary
A high-density capacitor and a method for manufacturing the same are disclosed. The high-density capacitor includes a metal-oxide-semiconductor (MOS) capacitor having a silicon layer with a dopant concentration of at least 1×1020 cm-3; a first dielectric layer formed on above the silicon layer, and a first metal layer formed above the first dielectric layer.