Low-Voltage MOS Cascode Current Mirror Biasing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing cascode current mirror circuits face challenges in maintaining accurate current mirroring and high voltage swing, especially under varying environmental and technological conditions, with prior art biasing schemes failing to optimize transistors' operation in the active region and being suboptimal for different transistor types and low-voltage supply environments.
Innovation Solution
A biasing scheme for compound cascode current mirrors that maintains the mirror transistors' drain-source voltage at the overdrive voltage, using a feedback loop and bias circuit with differential transistor pairs to ensure transistors operate on the edge of saturation, allowing for high voltage swing and accurate current mirroring across different operational conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If cascoding is used to multiply output resistance, then output impedance increases, but output voltage swing becomes limited
Solution Approach 1:
The patent changes the biasing parameters of the cascode current mirror circuit by introducing a body effect compensation mechanism. The bulk terminals of the cascode transistors are connected to specific voltage nodes that dynamically adjust the threshold voltage to maintain optimal operation point, thereby preserving voltage swing while maintaining high output impedance through proper cascode configuration
Solution Approach 2:
The patent implements feedback by connecting the bulk terminals of the cascode transistors to voltage nodes that are derived from the circuit's own operation. This self-biasing scheme creates a feedback loop that automatically adjusts the transistor operating points to maintain the desired balance between output impedance and voltage swing without requiring external control
2Use of energy by moving object
If supply voltage is reduced for portable devices, then power consumption decreases, but voltage headroom for cascode operation becomes insufficient
Solution Approach 1:
The patent changes the voltage distribution parameters within the cascode circuit by using body effect compensation. The dynamic adjustment of bulk terminal voltages allows the transistors to operate at lower overdrive voltages, effectively reducing the total voltage headroom requirement while maintaining proper saturation operation, thus enabling low-voltage portable device applications
Solution Approach 2:
The patent introduces dynamic biasing where the bulk terminal voltages are not fixed but are derived from active circuit nodes that adapt to changing operating conditions. This dynamic adjustment allows the circuit to optimize its voltage distribution in real-time, maintaining adequate headroom for cascode operation even when the overall supply voltage is reduced for power-saving purposes
3Reliability
If body effect is present with bulk terminal voltage difference, then threshold voltage increases, but transistor operation in active region becomes less reliable
Solution Approach 1:
The patent uses feedback by connecting bulk terminals to voltage nodes that automatically compensate for body effect. The bulk terminal voltages are derived from circuit nodes that respond to operating conditions, creating a self-regulating mechanism that maintains threshold voltage stability and ensures reliable active region operation through automatic adjustment of the biasing conditions
Data Source
AI summary
A circuit and a method for biasing a compound cascode current mirror (CCCM) that enables high-voltage swing at the output and accurate current mirroring is presented. The CCCM has mirror transistors and cascode transistors which may be of a different technology kind. The drain-source voltage Vds of the mirror transistor on the input leg of the CCCM is held at a voltage Vov that is generated by the biasing circuit; Vov is the overdrive voltage of the input mirror transistor of the CCCM and the value of Vov is maintained by the bias circuit and a feed-back amplifier such that the mirror transistor remains on the edge of its active region, over manufacture deviations and tracks even over operational conditions such as temperature and supply variations. The feed-back amplifier drives the gates of the cascode transistors and uses its feedback node to hold the Vds at Vov.